[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)

[Sameer Sahasrabuddhe via cfe-commits]

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@@ -2439,6 +2597,68 @@ bool WaitcntBrackets::mergeScore(const MergeInfo &M, unsigned &Score,
   return OtherShifted > MyShifted;
 }
 
+bool WaitcntBrackets::mergeAsyncMarkers(
+    const MergeInfo MergeInfos[NUM_INST_CNTS],
+    const SmallVectorImpl<std::array<unsigned, NUM_INST_CNTS>> &OtherMarkers) {
+  bool StrictDom = false;
+
+  LLVM_DEBUG(dbgs() << "Merging async markers ...");
+  // Early exit: both empty
+  if (AsyncMarkers.empty() && OtherMarkers.empty()) {
+    LLVM_DEBUG(dbgs() << " nothing to merge\n");
+    return false;
+  }
+  LLVM_DEBUG(dbgs() << '\n');
+
+  // Determine maximum length needed after merging
+  size_t MaxSize = std::max(AsyncMarkers.size(), OtherMarkers.size());
+
+  // Pad with zero-filled markers if our list is shorter.
+  // Zero represents "no pending async operations at this checkpoint"
+  // and acts as the identity element for max() during merging
+  std::array<unsigned, NUM_INST_CNTS> ZeroMarker{};
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ssahasra wrote:

The brace is needed for zero-initialization (or more formally, value-initialization). Without that, the array is default-initialized to unpredictable bits.

https://github.com/llvm/llvm-project/pull/173259