[clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)

[Sameer Sahasrabuddhe via cfe-commits]

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@@ -566,6 +569,27 @@ class SIInsertWaitcnts {
     return VmemReadMapping[getVmemType(Inst)];
   }
 
+  bool hasCPolAsyncBit(const MachineInstr &MI) const {
+    const MachineOperand *CPol = TII->getNamedOperand(MI, AMDGPU::OpName::cpol);
+    return CPol && (CPol->getImm() & AMDGPU::CPol::ASYNC_pregfx12);
+  }
+
+  bool isAsync(const MachineInstr &MI) const {
+    if (!SIInstrInfo::isLDSDMA(MI))
+      return false;
+    if (SIInstrInfo::usesASYNC_CNT(MI))
+      return true;
+    return hasCPolAsyncBit(MI);
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ssahasra wrote:

SIInstrInfo only has static information, while the CPol function here was trying to examine actual arguments on the dynamic instance. But that CPol bit itself is gone now, so this is moot.

https://github.com/llvm/llvm-project/pull/173259