[clang] [CIR] Upstream CIR codegen for insert x86 builtins (PR #170924)

[Andy Kaylor via cfe-commits]

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@@ -0,0 +1,90 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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andykaylor wrote:

Is this true?

https://github.com/llvm/llvm-project/pull/170924