[clang] [CIR] Upstream CIR codegen for insert x86 builtins (PR #170924)

[Andy Kaylor via cfe-commits]

================
@@ -0,0 +1,90 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
+// REQUIRES: x86-registered-target
+// RUN: %clang_cc1 -ffreestanding %s -triple=x86_64-unknown-linux -target-feature +avx -disable-O0-optnone -fclangir -emit-cir -o %t.cir | opt -S -passes=mem2reg
+// RUN: FileCheck --check-prefixes=CIR --input-file=%t.cir %s
----------------
andykaylor wrote:

Please add OGCG checks in this test.

https://github.com/llvm/llvm-project/pull/170924