[clang] [clang][RISCV] Add big-endian RISC-V target support (PR #165599)

Djordje Todorovic via cfe-commits cfe-commits at lists.llvm.org
Fri Oct 31 07:31:03 PDT 2025


================
@@ -255,6 +255,8 @@ class LLVM_LIBRARY_VISIBILITY FreeBSDTargetInfo : public OSTargetInfo<Target> {
       break;
     case llvm::Triple::loongarch64:
     case llvm::Triple::riscv64:
+    case llvm::Triple::riscv32be:
----------------
djtodoro wrote:

Well, it was removed with:

```
commit 4294fe173e9696a4c090857fa0766cd44c1964dc
Author: Brad Smith <brad at comstyle.com>
Date:   Sun Jan 19 22:23:11 2025 -0500

    [Driver][FreeBSD] Remove FreeBSD/loongarch32 support (#122515)
    
    FreeBSD going forward will not have 32-bit arch support.
    
    Also missed a spot with removing riscv32 support.
```

https://github.com/llvm/llvm-project/pull/165599


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