[clang] [llvm] [RISC-V] Add support for MIPS P8700 CPU (PR #117865)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Wed Nov 27 10:07:47 PST 2024
================
@@ -2017,6 +2169,74 @@ def : Pat<(binop_allwusers<add> GPR:$rs1, (AddiPair:$rs2)),
}
//===----------------------------------------------------------------------===//
+
+// MIPS extensions
+//===----------------------------------------------------------------------===//
+
+let Predicates = [UsesMIPSCMov] in {
+def : Pat<(select (XLenVT (setne (XLenVT GPR:$rs2), (XLenVT 0))),
----------------
topperc wrote:
Can we use the riscv_setne and riscv_seteq ComplexPatterns to reduce the number of variations here?
https://github.com/llvm/llvm-project/pull/117865
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