[clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v4 (PR #108636)
via cfe-commits
cfe-commits at lists.llvm.org
Wed Oct 9 02:47:41 PDT 2024
================
@@ -622,6 +665,47 @@ let Predicates = [BPFHasLdsx] in {
def LDD : LOADi64<BPF_DW, BPF_MEM, "u64", load>;
+class LOAD_ACQUIRE<BPFWidthModifer SizeOp, string OpcodeStr, RegisterClass RegTp>
+ : TYPE_LD_ST<BPF_ATOMIC.Value, SizeOp.Value,
+ (outs RegTp:$dst),
+ (ins MEMri:$addr),
+ "$dst = load_acquire(("#OpcodeStr#" *)($addr))",
+ []> {
+ bits<4> dst;
+ bits<20> addr;
+
+ let Inst{51-48} = dst;
+ let Inst{55-52} = addr{19-16}; // base reg
+ let Inst{47-32} = addr{15-0}; // offset
+ let Inst{7-4} = BPF_LOAD_ACQ.Value;
----------------
eddyz87 wrote:
I'm curious what would happen with BPF compiled as big endian? Instruction format reference says that `imm` field uses host byte order. It looks like we have a pass that fixes endianness in a generic way, but could you please extend `acquire-release.ll` to check what happens when `-march=bpfeb`?
https://github.com/llvm/llvm-project/pull/108636
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