[clang] [llvm] [RISC-V] Make EmitRISCVCpuSupports accept multiple features (PR #104917)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 20 21:59:12 PDT 2024
================
@@ -14439,33 +14439,60 @@ Value *CodeGenFunction::EmitRISCVCpuSupports(const CallExpr *E) {
if (!getContext().getTargetInfo().validateCpuSupports(FeatureStr))
return Builder.getFalse();
- // Note: We are making an unchecked assumption that the size of the
- // feature array is >= 1. This holds for any version of compiler-rt
- // which defines this interface.
- llvm::ArrayType *ArrayOfInt64Ty = llvm::ArrayType::get(Int64Ty, 1);
+ return EmitRISCVCpuSupports(ArrayRef<StringRef>(FeatureStr));
+}
+
+static Value *loadRISCVFeatureBits(unsigned Index, CGBuilderTy &Builder,
+ CodeGenModule &CGM,
+ llvm::LLVMContext &Context) {
+ llvm::Type *Int32Ty = llvm::Type::getInt32Ty(Context);
----------------
topperc wrote:
Builder.getInt32Ty() and getInt64Ty? The Context isn't needed.
https://github.com/llvm/llvm-project/pull/104917
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