[clang] [llvm] [RISC-V] Make EmitRISCVCpuSupports accept multiple features (PR #104917)
Piyou Chen via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 20 21:26:08 PDT 2024
================
@@ -14439,33 +14440,60 @@ Value *CodeGenFunction::EmitRISCVCpuSupports(const CallExpr *E) {
if (!getContext().getTargetInfo().validateCpuSupports(FeatureStr))
return Builder.getFalse();
- // Note: We are making an unchecked assumption that the size of the
- // feature array is >= 1. This holds for any version of compiler-rt
- // which defines this interface.
- llvm::ArrayType *ArrayOfInt64Ty = llvm::ArrayType::get(Int64Ty, 1);
+ return EmitRISCVCpuSupports(ArrayRef<StringRef>(FeatureStr));
+}
+
+static Value *loadRISCVFeatureBits(unsigned Index, CGBuilderTy &Builder,
+ CodeGenModule &CGM,
+ llvm::LLVMContext &Context) {
+ llvm::Type *Int32Ty = llvm::Type::getInt32Ty(Context);
+ llvm::Type *Int64Ty = llvm::Type::getInt64Ty(Context);
+ llvm::ArrayType *ArrayOfInt64Ty =
+ llvm::ArrayType::get(Int64Ty, llvm::RISCV::RISCVFeatureBitSize);
llvm::Type *StructTy = llvm::StructType::get(Int32Ty, ArrayOfInt64Ty);
llvm::Constant *RISCVFeaturesBits =
CGM.CreateRuntimeVariable(StructTy, "__riscv_feature_bits");
- auto *GV = cast<llvm::GlobalValue>(RISCVFeaturesBits);
- GV->setDSOLocal(true);
-
- auto LoadFeatureBit = [&](unsigned Index) {
- // Create GEP then load.
- Value *IndexVal = llvm::ConstantInt::get(Int32Ty, Index);
- llvm::Value *GEPIndices[] = {Builder.getInt32(0), Builder.getInt32(1),
- IndexVal};
- Value *Ptr =
- Builder.CreateInBoundsGEP(StructTy, RISCVFeaturesBits, GEPIndices);
- Value *FeaturesBit =
- Builder.CreateAlignedLoad(Int64Ty, Ptr, CharUnits::fromQuantity(8));
- return FeaturesBit;
- };
+ cast<llvm::GlobalValue>(RISCVFeaturesBits)->setDSOLocal(true);
+ Value *IndexVal = llvm::ConstantInt::get(Int32Ty, Index);
+ llvm::Value *GEPIndices[] = {Builder.getInt32(0), Builder.getInt32(1),
+ IndexVal};
+ Value *Ptr =
+ Builder.CreateInBoundsGEP(StructTy, RISCVFeaturesBits, GEPIndices);
+ Value *FeaturesBit =
+ Builder.CreateAlignedLoad(Int64Ty, Ptr, CharUnits::fromQuantity(8));
+ return FeaturesBit;
+}
+
+Value *CodeGenFunction::EmitRISCVCpuSupports(ArrayRef<StringRef> FeaturesStrs) {
+ const unsigned RISCVFeatureLength = llvm::RISCV::RISCVFeatureBitSize;
+ SmallVector<uint64_t, 2> RequireBitMasks(RISCVFeatureLength);
----------------
BeMg wrote:
Updated
https://github.com/llvm/llvm-project/pull/104917
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