[clang] [llvm] [RISCV] Add Hazard3 Core as taped out for RP2350 (PR #102452)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Fri Aug 16 14:05:21 PDT 2024
================
@@ -402,6 +402,21 @@
// MCPU-SIFIVE-P670-SAME: "-target-feature" "+zvkt"
// MCPU-SIFIVE-P670-SAME: "-target-abi" "lp64d"
+// RUN: %clang -target riscv32 -### -c %s 2>&1 -mcpu=rp2350-hazard3 | FileCheck -check-prefix=MCPU-HAZARD3 %s
+// MCPU-HAZARD3: "-target-cpu" "rp2350-hazard3"
+// MCPU-HAZARD3-SAME: "-target-feature" "+m"
+// MCPU-HAZARD3-SAME: "-target-feature" "+a"
+// MCPU-HAZARD3-SAME: "-target-feature" "+c"
+// MCPU-HAZARD3-SAME: "-target-feature" "+zicsr"
+// MCPU-HAZARD3-SAME: "-target-feature" "+zifencei"
+// MCPU-HAZARD3-SAME: "-target-feature" "+zcb"
+// MCPU-HAZARD3-SAME: "-target-feature" "+zcmp"
+// MCPU-HAZARD3-SAME: "-target-feature" "+zba"
----------------
topperc wrote:
LLVM does not currently set __riscv_isa_b when Zba, Zbb, and Zbs are specified by themselves. Retroactively adding new extensions implied by older extension causes things like -fno-integrated-assembler to break if clang knows about B but the GNU assembler on your system doesn't.
https://github.com/llvm/llvm-project/pull/102452
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