[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

[Michael Maitland via cfe-commits]

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@@ -762,6 +773,14 @@ def HasStdExtZvkg : Predicate<"Subtarget->hasStdExtZvkg()">,
                     AssemblerPredicate<(all_of FeatureStdExtZvkg),
                         "'Zvkg' (Vector GCM instructions for Cryptography)">;
 
+def FeatureStdExtZvkgs
+    : RISCVExperimentalExtension<"zvkgs", 0, 7,
+                                 "'Zvkgs' (Vector-Scalar GCM instructions for Cryptography)",
+                                 [FeatureStdExtZvkg]>;
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michaelmaitland wrote:

>From the Zvkgs speck:

> Zvkgs depends on Zvkg

Does this part of the spec mean that Zvkg must be present too, or does it mean that if Zvkgs is present, then Zvkg is implied?

https://github.com/llvm/llvm-project/pull/103709