[llvm] [clang] [RISCV] Add sifive-p670 processor (PR #79015)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Tue Jan 23 12:17:53 PST 2024
================
@@ -2000,6 +2000,14 @@ bool RISCVTargetLowering::shouldSinkOperands(
if (!I->getType()->isVectorTy() || !Subtarget.hasVInstructions())
return false;
+ // Don't sink splat operands if the target prefers it. Some targets requires
----------------
topperc wrote:
These should probably be stacked the other way. Adding a new cpu that uses existing extensions with no new scheduler mode is easy to get approved. Adding a new tuning flag potentially requires more discussion. So in my opinion the stack should be
-Add new mcpu=sifive-p670
-Add TuneSinkSplatOperand and add to sifive-p670
https://github.com/llvm/llvm-project/pull/79015
More information about the cfe-commits
mailing list