[clang] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)

Philip Reames via cfe-commits cfe-commits at lists.llvm.org
Wed Oct 25 12:37:46 PDT 2023


preames wrote:

Can you separate out the basic processor definition (using NoSchedModel), and a patch which adds the scheduling model?  We can at least get the processor definition landed while we iterate on the scheduling related pieces.  

https://github.com/llvm/llvm-project/pull/70232


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