[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

[Wang Pengcheng via Phabricator via cfe-commits]

wangpc added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVProcessors.td:185
+                                       FeatureStdExtZbb,
+                                       FeatureUnalignedScalarMem],
                                       [TuneSiFive7,
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craig.topper wrote:
> wangpc wrote:
> > This can be tested in `clang/test/Driver/riscv-cpus.c`.
> This shouldn’t be in here. That was for testing and I accidentally committed it
Are there any processors in upstream that support unaligned memory access so that we can test it?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D159145/new/

https://reviews.llvm.org/D159145