[PATCH] D159145: [RISCV] Don't add -unaligned-scalar-mem to target features by default.

Craig Topper via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Tue Aug 29 19:44:18 PDT 2023


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVProcessors.td:185
+                                       FeatureStdExtZbb,
+                                       FeatureUnalignedScalarMem],
                                       [TuneSiFive7,
----------------
wangpc wrote:
> This can be tested in `clang/test/Driver/riscv-cpus.c`.
This shouldn’t be in here. That was for testing and I accidentally committed it


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D159145/new/

https://reviews.llvm.org/D159145



More information about the cfe-commits mailing list