[PATCH] D134678: [Clang][AArch64][SME] Add intrinsics for ZA array load/store (LDR/STR)

[Bryan Chan via Phabricator via cfe-commits]

bryanpkc marked an inline comment as done.
bryanpkc added inline comments.


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Comment at: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_str.c:24
+// CHECK-NEXT:    [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]]
+// CHECK-NEXT:    tail call void @llvm.aarch64.sme.str(i32 [[SLICE_BASE:%.*]], ptr [[TMP0]])
+// CHECK-NEXT:    ret void
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sdesmalen wrote:
> This is missing an `add` of `15` to `%slice_base`.
Thanks for catching that. Fixed.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D134678/new/

https://reviews.llvm.org/D134678