[PATCH] D154093: [clang-format] Break long strings in Verilog

[sstwcw via Phabricator via cfe-commits]

sstwcw added a comment.

If it is expected that the method does not modify the field, and the expectation is not fulfilled, I prefer to make it clear rather than to pretend that the method works as expected.  Can you help me come up with an alternative?  Braces need to be added around the string literal when it gets broken into parts.  Only one pair of braces need to be added no matter how many times the string gets broken.  My solution was to use a mutable field to mark whether braces have already been added.  Do you have another way?


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  https://reviews.llvm.org/D154093/new/

https://reviews.llvm.org/D154093