[PATCH] D153659: [RISCV] Fix name mangling for LMUL!=1 vector types with attribute(rvv_vector_bits)

[Aaron Ballman via Phabricator via cfe-commits]

aaron.ballman added a reviewer: rjmccall.
aaron.ballman added a subscriber: rjmccall.
aaron.ballman added inline comments.


================
Comment at: clang/lib/AST/ItaniumMangle.cpp:3879
+
+  Out << "9__RVV_VLSI" << 'u' << TypeNameStr.size() << TypeNameStr << "Lj"
       << VecSizeInBits << "EE";
----------------
CC @rjmccall for ABI review -- naïve, possibly dumb question: shouldn't we be using the vendor extended builtin type encoding for this sort of thing? (https://itanium-cxx-abi.github.io/cxx-abi/abi.html#mangle.builtin-type)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153659/new/

https://reviews.llvm.org/D153659