[PATCH] D153370: [RISCV] Add support for custom instructions for Sifive S76.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Support/RISCVISAInfo.cpp:135
     {"xventanacondops", RISCVExtensionVersion{1, 0}},
+    {"xsfcie", RISCVExtensionVersion{1, 0}},
 };
----------------
Put this with xsfvcp


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Comment at: llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp:564
                           "CORE-V Bit Manipulation custom opcode table");
+    TRY_TO_DECODE_FEATURE(RISCV::FeatureVendorXSfcie, DecoderTableXSfcie32,
+                          "SiFive custom instruction opcode table");
----------------
Keep SiFive extensions together.


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Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:763
 
+def FeatureVendorXSfcie
+    : SubtargetFeature<"xsfcie", "HasVendorXSfcie", "true",
----------------
Keep SiFive extensions together


================
Comment at: llvm/lib/Target/RISCV/RISCVFeatures.td:765
+    : SubtargetFeature<"xsfcie", "HasVendorXSfcie", "true",
+                       "'XSfcie' (SiFive Custom Instruction Extension SFCIE for S76.)">;
+def HasVendorXSfcie : Predicate<"Subtarget->hasVendorXSfcie()">,
----------------
I believe the SiFive documentation uses SCIE not SFCIE?


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:508
+
+let Predicates = [IsRV64, HasVendorXSfcie] in {
+let hasSideEffects = 1, mayLoad = 0, mayStore = 0, DecoderNamespace = "XSfcie" in {
----------------
I don't think these are restricted to RV64. They're in the E76 core complex manual too.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:510
+let hasSideEffects = 1, mayLoad = 0, mayStore = 0, DecoderNamespace = "XSfcie" in {
+def Sfv_CFLUSH_D_L1 : RVInstI<0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1), "cflush.d.l1","$rs1">,  Sched<[]> {
+  let rd = 0;
----------------
Don't exceed 80 columns


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td:510
+let hasSideEffects = 1, mayLoad = 0, mayStore = 0, DecoderNamespace = "XSfcie" in {
+def Sfv_CFLUSH_D_L1 : RVInstI<0b000, OPC_SYSTEM, (outs), (ins GPR:$rs1), "cflush.d.l1","$rs1">,  Sched<[]> {
+  let rd = 0;
----------------
craig.topper wrote:
> Don't exceed 80 columns
Use SF_ instead of Sfv_


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153370/new/

https://reviews.llvm.org/D153370