[PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent

Nemanja Ivanovic via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Fri Jun 16 06:43:25 PDT 2023


nemanjai added inline comments.


================
Comment at: llvm/include/llvm/IR/Intrinsics.td:903-907
+// Load of a value provided by the system library at a fixed address. Used for
+// accessing things like HWCAP word provided by GLIBC.
+def int_fixed_addr_ld
+    : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
+                            [IntrInaccessibleMemOnly, ImmArg<ArgIndex<0>>]>;
----------------
arsenm wrote:
> From this description I don't understand what this is supposed to do. What does the input mean? Why does this use an i32 immarg and not a pointer? Why is the result only i32?
That is fair enough. The description is fairly vague. I can try to improve it as per below. The parameter for this is not a pointer (i.e. not an address). It is an immediate that represents the index into the enumeration of values that are provided at a fixed address. The back end is then free to produce the actual fixed address and the load itself.
The choice for the result type was admittedly arbitrary - on PPC, the values provided by GLIBC are 32-bit words.

Proposed comment describing this intrinsic:
```
// This intrinsic is provided to allow back ends to emit load
// instructions that load a value from a fixed address. The
// parameter to the intrinsic is not an address, but an
// immediate index into an enumeration that contains the
// union of all such values available on all back ends.
// An example is the HWCAP/HWCAP2/CPUID words
// provided by GLIBC on PowerPC to allow fast access
// to commonly used parts of AUXV. These are provided
// at a fixed offset into the TCB (accessible through the
// thread pointer).
```


================
Comment at: llvm/include/llvm/IR/Intrinsics.td:905
+// accessing things like HWCAP word provided by GLIBC.
+def int_fixed_addr_ld
+    : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
----------------
arsenm wrote:
> I think a new intrinsic should be in a separate commit 
Sounds good.


================
Comment at: llvm/include/llvm/Support/TargetOpcodes.def:148
 
+/// This pseudo-instruction loads a value provided by libc at afixed address.
+/// For example, GLIBC provides HWCAP, HWCAP2 and CPUID at a fixed address
----------------
arsenm wrote:
> Typo afixed
ACK


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https://reviews.llvm.org/D152914



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