[PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent
Matt Arsenault via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Jun 14 18:33:54 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/include/llvm/IR/Intrinsics.td:903-907
+// Load of a value provided by the system library at a fixed address. Used for
+// accessing things like HWCAP word provided by GLIBC.
+def int_fixed_addr_ld
+ : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
+ [IntrInaccessibleMemOnly, ImmArg<ArgIndex<0>>]>;
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>From this description I don't understand what this is supposed to do. What does the input mean? Why does this use an i32 immarg and not a pointer? Why is the result only i32?
================
Comment at: llvm/include/llvm/IR/Intrinsics.td:905
+// accessing things like HWCAP word provided by GLIBC.
+def int_fixed_addr_ld
+ : DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
----------------
I think a new intrinsic should be in a separate commit
================
Comment at: llvm/include/llvm/Support/TargetOpcodes.def:148
+/// This pseudo-instruction loads a value provided by libc at afixed address.
+/// For example, GLIBC provides HWCAP, HWCAP2 and CPUID at a fixed address
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Typo afixed
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152914/new/
https://reviews.llvm.org/D152914
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