[PATCH] D152071: [3/11][Clang][RISCV] Expand all variants for unit stride segment load

[Yueh-Ting (eop) Chen via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0e9548bbc5e5: [3/11][Clang][RISCV] Expand all variants for unit stride segment load (authored by eopXD).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152071/new/

https://reviews.llvm.org/D152071

Files:
  clang/include/clang/Basic/riscv_vector.td
  clang/lib/Support/RISCVVIntrinsicUtils.cpp
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e32_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32_tuple.c
  clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32_tuple.c

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D152071.531202.patch
Type: text/x-patch
Size: 170621 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20230614/42573093/attachment-0001.bin>