[PATCH] D152071: [3/11][Clang][RISCV] Expand all variants for unit stride segment load
Yueh-Ting (eop) Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Jun 13 23:48:22 PDT 2023
eopXD updated this revision to Diff 531201.
eopXD added a comment.
Rebase to latest main.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D152071/new/
https://reviews.llvm.org/D152071
Files:
clang/include/clang/Basic/riscv_vector.td
clang/lib/Support/RISCVVIntrinsicUtils.cpp
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vlseg2e32_tuple.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vlseg2e32_tuple.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vlseg2e32_tuple.c
clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vlseg2e32_tuple.c
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D152071.531201.patch
Type: text/x-patch
Size: 170621 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20230614/c5914b50/attachment-0001.bin>
More information about the cfe-commits
mailing list