[clang] cd5c4cb - [RISCV] Add SiFive extension support

[via cfe-commits]

Author: Kito Cheng
Date: 2023-04-24T03:12:49-07:00
New Revision: cd5c4cb7e0aea8beffe9642c9202f677fff59ca0

URL: https://github.com/llvm/llvm-project/commit/cd5c4cb7e0aea8beffe9642c9202f677fff59ca0
DIFF: https://github.com/llvm/llvm-project/commit/cd5c4cb7e0aea8beffe9642c9202f677fff59ca0.diff

LOG: [RISCV] Add SiFive extension support

Add SiFive extension support
Depends on D147934

Differential Revision: https://reviews.llvm.org/D147935

Added: 
    

Modified: 
    clang/include/clang/Support/RISCVVIntrinsicUtils.h
    clang/utils/TableGen/RISCVVEmitter.cpp

Removed: 
    


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diff  --git a/clang/include/clang/Support/RISCVVIntrinsicUtils.h b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
index bf31dced98b2b..1a626e6a776a8 100644
--- a/clang/include/clang/Support/RISCVVIntrinsicUtils.h
+++ b/clang/include/clang/Support/RISCVVIntrinsicUtils.h
@@ -462,8 +462,9 @@ enum RVVRequire : uint8_t {
   RVV_REQ_None = 0,
   RVV_REQ_RV64 = 1 << 0,
   RVV_REQ_FullMultiply = 1 << 1,
+  RVV_REQ_Xsfvcp = 1 << 2,
 
-  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_FullMultiply)
+  LLVM_MARK_AS_BITMASK_ENUM(RVV_REQ_Xsfvcp)
 };
 
 // Raw RVV intrinsic info, used to expand later.

diff  --git a/clang/utils/TableGen/RISCVVEmitter.cpp b/clang/utils/TableGen/RISCVVEmitter.cpp
index 365fa8a67ffa1..6228e0256d54e 100644
--- a/clang/utils/TableGen/RISCVVEmitter.cpp
+++ b/clang/utils/TableGen/RISCVVEmitter.cpp
@@ -633,6 +633,7 @@ void RVVEmitter::createRVVIntrinsics(
       RVVRequire RequireExt = StringSwitch<RVVRequire>(RequiredFeature)
                                   .Case("RV64", RVV_REQ_RV64)
                                   .Case("FullMultiply", RVV_REQ_FullMultiply)
+                                  .Case("Xsfvcp", RVV_REQ_Xsfvcp)
                                   .Default(RVV_REQ_None);
       assert(RequireExt != RVV_REQ_None && "Unrecognized required feature?");
       SR.RequiredExtensions |= RequireExt;