[PATCH] D145088: [RISCV] Add attribute(riscv_rvv_vector_bits(N)) based on AArch64 arm_sve_vector_bits.
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Wed Apr 12 08:56:22 PDT 2023
craig.topper added inline comments.
================
Comment at: clang/test/SemaCXX/attr-riscv-rvv-vector-bits.cpp:12
+
+template<typename T> struct S { T var; };
+
----------------
@erichkeane does this cover the dependent case or were you looking for something else?
Here are on the only mentions of template I see in SVE tests that use this attribute.
```
clang/test$ ack template `ack arm_sve_vector -l`
CodeGenCXX/aarch64-mangle-sve-fixed-vectors.cpp
37:template <typename T> struct S {};
SemaCXX/attr-arm-sve-vector-bits.cpp
16:template<typename T> struct S { T var; };
```
Here is the result for this patch
```
clang/test$ ack template `ack riscv_rvv_vector -l`
CodeGenCXX/riscv-mangle-rvv-fixed-vectors.cpp
48:template <typename T> struct S {};
SemaCXX/attr-riscv-rvv-vector-bits.cpp
12:template<typename T> struct S { T var; };
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D145088/new/
https://reviews.llvm.org/D145088
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