[clang] a1fae98 - [AArch64] Add svboolx2_t and svboolx4_t tuple types
Matt Devereau via cfe-commits
cfe-commits at lists.llvm.org
Tue Mar 14 03:17:50 PDT 2023
Author: Matt Devereau
Date: 2023-03-14T10:16:51Z
New Revision: a1fae98ba95c18ea6b673fc3c177b917e0f5aa56
URL: https://github.com/llvm/llvm-project/commit/a1fae98ba95c18ea6b673fc3c177b917e0f5aa56
DIFF: https://github.com/llvm/llvm-project/commit/a1fae98ba95c18ea6b673fc3c177b917e0f5aa56.diff
LOG: [AArch64] Add svboolx2_t and svboolx4_t tuple types
https://reviews.llvm.org/D145505
Added:
clang/test/CodeGen/svboolx2_t.cpp
clang/test/CodeGen/svboolx4_t.cpp
Modified:
clang/include/clang/Basic/AArch64SVEACLETypes.def
clang/lib/AST/ASTContext.cpp
clang/lib/AST/Type.cpp
clang/lib/CodeGen/CodeGenTypes.cpp
clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
clang/utils/TableGen/SveEmitter.cpp
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/AArch64SVEACLETypes.def b/clang/include/clang/Basic/AArch64SVEACLETypes.def
index cb2f673af06d5..56af270e1d10a 100644
--- a/clang/include/clang/Basic/AArch64SVEACLETypes.def
+++ b/clang/include/clang/Basic/AArch64SVEACLETypes.def
@@ -129,6 +129,8 @@ SVE_VECTOR_TYPE("__clang_svfloat64x4_t", "svfloat64x4_t", SveFloat64x4, SveFloat
SVE_VECTOR_TYPE("__clang_svbfloat16x4_t", "svbfloat16x4_t", SveBFloat16x4, SveBFloat16x4Ty, 32, 16, true, false, true)
SVE_PREDICATE_TYPE("__SVBool_t", "__SVBool_t", SveBool, SveBoolTy, 16)
+SVE_PREDICATE_TYPE("__clang_svboolx2_t", "svboolx2_t", SveBoolx2, SveBoolx2Ty, 32)
+SVE_PREDICATE_TYPE("__clang_svboolx4_t", "svboolx4_t", SveBoolx4, SveBoolx4Ty, 64)
SVE_OPAQUE_TYPE("__SVCount_t", "__SVCount_t", SveCount, SveCountTy)
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 90448c378458b..14c9ab9c31a88 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4041,6 +4041,10 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
return SVE_INT_ELTTY(64, 2, false, 4);
case BuiltinType::SveBool:
return SVE_ELTTY(BoolTy, 16, 1);
+ case BuiltinType::SveBoolx2:
+ return SVE_ELTTY(BoolTy, 16, 2);
+ case BuiltinType::SveBoolx4:
+ return SVE_ELTTY(BoolTy, 16, 4);
case BuiltinType::SveFloat16:
return SVE_ELTTY(HalfTy, 8, 1);
case BuiltinType::SveFloat16x2:
diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp
index 7710adbb274ae..96e611968ca18 100644
--- a/clang/lib/AST/Type.cpp
+++ b/clang/lib/AST/Type.cpp
@@ -2401,6 +2401,8 @@ bool Type::isVLSTBuiltinType() const {
case BuiltinType::SveFloat64:
case BuiltinType::SveBFloat16:
case BuiltinType::SveBool:
+ case BuiltinType::SveBoolx2:
+ case BuiltinType::SveBoolx4:
return true;
default:
return false;
diff --git a/clang/lib/CodeGen/CodeGenTypes.cpp b/clang/lib/CodeGen/CodeGenTypes.cpp
index c31a3f0edf6d5..be9516925da25 100644
--- a/clang/lib/CodeGen/CodeGenTypes.cpp
+++ b/clang/lib/CodeGen/CodeGenTypes.cpp
@@ -596,6 +596,8 @@ llvm::Type *CodeGenTypes::ConvertType(QualType T) {
case BuiltinType::SveInt64x4:
case BuiltinType::SveUint64x4:
case BuiltinType::SveBool:
+ case BuiltinType::SveBoolx2:
+ case BuiltinType::SveBoolx4:
case BuiltinType::SveFloat16:
case BuiltinType::SveFloat16x2:
case BuiltinType::SveFloat16x3:
diff --git a/clang/test/CodeGen/svboolx2_t.cpp b/clang/test/CodeGen/svboolx2_t.cpp
new file mode 100644
index 0000000000000..060940d8755f5
--- /dev/null
+++ b/clang/test/CodeGen/svboolx2_t.cpp
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -emit-llvm -o - %s | FileCheck %s
+
+// CHECK-LABEL: @_Z3foo10svboolx2_t(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca <vscale x 32 x i1>, align 2
+// CHECK-NEXT: store <vscale x 32 x i1> [[ARG:%.*]], ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 32 x i1>, ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: ret <vscale x 32 x i1> [[TMP0]]
+//
+__clang_svboolx2_t foo(__clang_svboolx2_t arg) { return arg; }
+
+__clang_svboolx2_t bar();
+// CHECK-LABEL: @_Z4foo2v(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[CALL:%.*]] = call <vscale x 32 x i1> @_Z3barv()
+// CHECK-NEXT: ret <vscale x 32 x i1> [[CALL]]
+//
+__clang_svboolx2_t foo2() { return bar(); }
+
+__clang_svboolx2_t bar2(__clang_svboolx2_t);
+// CHECK-LABEL: @_Z4foo310svboolx2_t(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca <vscale x 32 x i1>, align 2
+// CHECK-NEXT: store <vscale x 32 x i1> [[ARG:%.*]], ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 32 x i1>, ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[CALL:%.*]] = call <vscale x 32 x i1> @_Z4bar210svboolx2_t(<vscale x 32 x i1> [[TMP0]])
+// CHECK-NEXT: ret <vscale x 32 x i1> [[CALL]]
+//
+__clang_svboolx2_t foo3(__clang_svboolx2_t arg) { return bar2(arg); }
+
diff --git a/clang/test/CodeGen/svboolx4_t.cpp b/clang/test/CodeGen/svboolx4_t.cpp
new file mode 100644
index 0000000000000..8360786c06d70
--- /dev/null
+++ b/clang/test/CodeGen/svboolx4_t.cpp
@@ -0,0 +1,31 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -S -emit-llvm -o - %s | FileCheck %s
+
+// CHECK-LABEL: @_Z3foo10svboolx4_t(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca <vscale x 64 x i1>, align 2
+// CHECK-NEXT: store <vscale x 64 x i1> [[ARG:%.*]], ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 64 x i1>, ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: ret <vscale x 64 x i1> [[TMP0]]
+//
+__clang_svboolx4_t foo(__clang_svboolx4_t arg) { return arg; }
+
+__clang_svboolx4_t bar();
+// CHECK-LABEL: @_Z4foo2v(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[CALL:%.*]] = call <vscale x 64 x i1> @_Z3barv()
+// CHECK-NEXT: ret <vscale x 64 x i1> [[CALL]]
+//
+__clang_svboolx4_t foo2() { return bar(); }
+
+__clang_svboolx4_t bar2(__clang_svboolx4_t);
+// CHECK-LABEL: @_Z4foo310svboolx4_t(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[ARG_ADDR:%.*]] = alloca <vscale x 64 x i1>, align 2
+// CHECK-NEXT: store <vscale x 64 x i1> [[ARG:%.*]], ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 64 x i1>, ptr [[ARG_ADDR]], align 2
+// CHECK-NEXT: [[CALL:%.*]] = call <vscale x 64 x i1> @_Z4bar210svboolx4_t(<vscale x 64 x i1> [[TMP0]])
+// CHECK-NEXT: ret <vscale x 64 x i1> [[CALL]]
+//
+__clang_svboolx4_t foo3(__clang_svboolx4_t arg) { return bar2(arg); }
+
diff --git a/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp b/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
index fd4af61a78620..f387824b56661 100644
--- a/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
+++ b/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
@@ -108,3 +108,7 @@ void f46(S<__clang_svbfloat16x2_t>) {}
void f47(S<__clang_svbfloat16x3_t>) {}
// CHECK: _Z3f481SI14svbfloat16x4_tE
void f48(S<__clang_svbfloat16x4_t>) {}
+// CHECK: _Z3f491SI10svboolx2_tE
+void f49(S<__clang_svboolx2_t>) {}
+// CHECK: _Z3f501SI10svboolx4_tE
+void f50(S<__clang_svboolx4_t>) {}
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index 1a90767cf0d2b..bc50cbad4b541 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -1140,7 +1140,9 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
OS << "typedef __clang_svfloat16x4_t svfloat16x4_t;\n";
OS << "typedef __clang_svfloat32x4_t svfloat32x4_t;\n";
OS << "typedef __clang_svfloat64x4_t svfloat64x4_t;\n";
- OS << "typedef __SVBool_t svbool_t;\n\n";
+ OS << "typedef __SVBool_t svbool_t;\n";
+ OS << "typedef __clang_svboolx2_t svboolx2_t;\n";
+ OS << "typedef __clang_svboolx4_t svboolx4_t;\n\n";
OS << "typedef __clang_svbfloat16x2_t svbfloat16x2_t;\n";
OS << "typedef __clang_svbfloat16x3_t svbfloat16x3_t;\n";
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