[PATCH] D145883: [Flang][RISCV] Emit target features for RISC-V
Andrzej Warzynski via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Mar 13 14:11:48 PDT 2023
awarzynski added inline comments.
================
Comment at: flang/test/Driver/target-cpu-features-invalid.f90:13
+! CHECK-INVALID-CPU: 'supercpu' is not a recognized processor for this target (ignoring processor)
+! CHECK-INVALID-FEATURE: '+superspeed' is not a recognized feature for this target (ignoring feature)
----------------
jrtc27 wrote:
> awarzynski wrote:
> > jrtc27 wrote:
> > > Don't these come from the backend? Testing them here doesn't seem right...
> > > Don't these come from the backend?
> >
> > No. Both options are defined in Clang's Options.td:
> > * [[ https://github.com/llvm/llvm-project/blob/0aac9a2875bad4f065367e4a6553fad78605f895/clang/include/clang/Driver/Options.td#L5251-L5253 | -target-feaure ]]
> > * [[ https://github.com/llvm/llvm-project/blob/0aac9a2875bad4f065367e4a6553fad78605f895/clang/include/clang/Driver/Options.td#L5248-L5250 | -target-cpu ]]
> Then why do they need aarch64-registered-target? Either they're coming from the backend and so you need the backend, or they're coming from the frontend and so you don't need the backend.
Can you clarify what you mean by "they"? I'm referring to driver's command line options, which is what this file is testing.
> Either they're coming from the backend and so you need the backend, or they're coming from the frontend and so you don't need the backend.
Again, this is a driver test. The driver integrates the frontend and the backend (as well as other parts).
Are you suggesting that this test is moved to LLVM and a dependency on Flang is added to LLVM?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D145883/new/
https://reviews.llvm.org/D145883
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