[PATCH] D128648: [Clang][AArch64][SME] Add vector read/write (mova) intrinsics

[Bryan Chan via Phabricator via cfe-commits]

bryanpkc updated this revision to Diff 500639.
bryanpkc edited the summary of this revision.
bryanpkc added a comment.

Incorporated review comments for D127910 <https://reviews.llvm.org/D127910>:

- Added range checks for immediate operands.
- Refactored the TableGen definitions using a `multiclass`.
- Split `IsMove` flag into `IsRead` and `IsWrite`, and used them to avoid relying on LLVM intrinsic names during IR generation.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128648/new/

https://reviews.llvm.org/D128648

Files:
  clang/include/clang/Basic/TargetBuiltins.h
  clang/include/clang/Basic/arm_sme.td
  clang/include/clang/Basic/arm_sve_sme_incl.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/CodeGen/CodeGenFunction.h
  clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_read.c
  clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_write.c
  clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
  clang/utils/TableGen/SveEmitter.cpp

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