[PATCH] D127910: [Clang][AArch64][SME] Add vector load/store (ld1/st1) intrinsics
Bryan Chan via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Feb 21 15:54:46 PST 2023
bryanpkc marked an inline comment as done.
bryanpkc added inline comments.
================
Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8874
case SVETypeFlags::EltTyBool64:
+ case SVETypeFlags::EltTyBool128:
return Builder.getInt1Ty();
----------------
kmclaughlin wrote:
> Is it necessary to add an `EltTypeBool128`? I think the EmitSVEPredicateCast call in EmitSMELd1St1 is creating a vector based on the memory element type and not the predicate type?
You are right, `EltTypeBool128` is not used right now; I can remove it. When we started working on the pre-ACLE intrinsics in our downstream compiler, we were planning to add something like `svptrue_b128`, even though the hardware `PTRUE` instruction doesn't support the Q size specifier. It is still not clear to me how the ACLE wants users to create a predicate vector for a call to a `_za128` intrinsic.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127910/new/
https://reviews.llvm.org/D127910
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