[PATCH] D127910: [Clang][AArch64][SME] Add vector load/store (ld1/st1) intrinsics

[Kerry McLaughlin via Phabricator via cfe-commits]

kmclaughlin added inline comments.


================
Comment at: clang/lib/CodeGen/CGBuiltin.cpp:8874
   case SVETypeFlags::EltTyBool64:
+  case SVETypeFlags::EltTyBool128:
     return Builder.getInt1Ty();
----------------
Is it necessary to add an `EltTypeBool128`? I think the EmitSVEPredicateCast call in EmitSMELd1St1 is creating a vector based on the memory element type and not the predicate type?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D127910/new/

https://reviews.llvm.org/D127910