[clang] 081815b - [Clang] Regenerate check lines (NFC)
Nikita Popov via cfe-commits
cfe-commits at lists.llvm.org
Thu Feb 16 08:05:35 PST 2023
Author: Nikita Popov
Date: 2023-02-16T17:05:25+01:00
New Revision: 081815b4e32cc57debe974ff89d61436f3bcec83
URL: https://github.com/llvm/llvm-project/commit/081815b4e32cc57debe974ff89d61436f3bcec83
DIFF: https://github.com/llvm/llvm-project/commit/081815b4e32cc57debe974ff89d61436f3bcec83.diff
LOG: [Clang] Regenerate check lines (NFC)
Convert test to use update_cc_test_checks.
Added:
Modified:
clang/test/CodeGen/WebAssembly/wasm-varargs.c
Removed:
################################################################################
diff --git a/clang/test/CodeGen/WebAssembly/wasm-varargs.c b/clang/test/CodeGen/WebAssembly/wasm-varargs.c
index 91840c296096..869ff4afe5c1 100644
--- a/clang/test/CodeGen/WebAssembly/wasm-varargs.c
+++ b/clang/test/CodeGen/WebAssembly/wasm-varargs.c
@@ -1,7 +1,28 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature
// RUN: %clang_cc1 -no-opaque-pointers -triple wasm32-unknown-unknown -o - -emit-llvm %s | FileCheck %s
#include <stdarg.h>
+// CHECK-LABEL: define {{[^@]+}}@test_i32
+// CHECK-SAME: (i8* noundef [[FMT:%.*]], ...) #[[ATTR0:[0-9]+]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store i8* [[FMT]], i8** [[FMT_ADDR]], align 4
+// CHECK-NEXT: [[VA1:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT: [[ARGP_CUR:%.*]] = load i8*, i8** [[VA]], align 4
+// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
+// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[ARGP_CUR]] to i32*
+// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
+// CHECK-NEXT: store i32 [[TMP1]], i32* [[V]], align 4
+// CHECK-NEXT: [[VA2:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_end(i8* [[VA2]])
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[V]], align 4
+// CHECK-NEXT: ret i32 [[TMP2]]
+//
int test_i32(char *fmt, ...) {
va_list va;
@@ -12,25 +33,31 @@ int test_i32(char *fmt, ...) {
return v;
}
-// CHECK-LABEL: define i32 @test_i32(i8*{{.*}} %fmt, ...) {{.*}} {
-// CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4
-// CHECK: [[VA:%[^,=]+]] = alloca i8*, align 4
-// CHECK: [[V:%[^,=]+]] = alloca i32, align 4
-// CHECK: store i8* %fmt, i8** [[FMT_ADDR]], align 4
-// CHECK: [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK: call void @llvm.va_start(i8* [[VA1]])
-// CHECK: [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
-// CHECK: [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
-// CHECK: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
-// CHECK: [[R3:%[^,=]+]] = bitcast i8* [[ARGP_CUR]] to i32*
-// CHECK: [[R4:%[^,=]+]] = load i32, i32* [[R3]], align 4
-// CHECK: store i32 [[R4]], i32* [[V]], align 4
-// CHECK: [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK: call void @llvm.va_end(i8* [[VA2]])
-// CHECK: [[R5:%[^,=]+]] = load i32, i32* [[V]], align 4
-// CHECK: ret i32 [[R5]]
-// CHECK: }
+// CHECK-LABEL: define {{[^@]+}}@test_i64
+// CHECK-SAME: (i8* noundef [[FMT:%.*]], ...) #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[V:%.*]] = alloca i64, align 8
+// CHECK-NEXT: store i8* [[FMT]], i8** [[FMT_ADDR]], align 4
+// CHECK-NEXT: [[VA1:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT: [[ARGP_CUR:%.*]] = load i8*, i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = ptrtoint i8* [[ARGP_CUR]] to i32
+// CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 7
+// CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], -8
+// CHECK-NEXT: [[ARGP_CUR_ALIGNED:%.*]] = inttoptr i32 [[TMP2]] to i8*
+// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[ARGP_CUR_ALIGNED]], i32 8
+// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[ARGP_CUR_ALIGNED]] to i64*
+// CHECK-NEXT: [[TMP4:%.*]] = load i64, i64* [[TMP3]], align 8
+// CHECK-NEXT: store i64 [[TMP4]], i64* [[V]], align 8
+// CHECK-NEXT: [[VA2:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_end(i8* [[VA2]])
+// CHECK-NEXT: [[TMP5:%.*]] = load i64, i64* [[V]], align 8
+// CHECK-NEXT: ret i64 [[TMP5]]
+//
long long test_i64(char *fmt, ...) {
va_list va;
@@ -41,28 +68,6 @@ long long test_i64(char *fmt, ...) {
return v;
}
-// CHECK-LABEL: define i64 @test_i64(i8*{{.*}} %fmt, ...) {{.*}} {
-// CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4
-// CHECK: [[VA:%[^,=]+]] = alloca i8*, align 4
-// CHECK: [[V:%[^,=]+]] = alloca i64, align 8
-// CHECK: store i8* %fmt, i8** [[FMT_ADDR]], align 4
-// CHECK: [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK: call void @llvm.va_start(i8* [[VA1]])
-// CHECK: [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
-// CHECK: [[R0:%[^,=]+]] = ptrtoint i8* [[ARGP_CUR]] to i32
-// CHECK: [[R1:%[^,=]+]] = add i32 [[R0]], 7
-// CHECK: [[R2:%[^,=]+]] = and i32 [[R1]], -8
-// CHECK: [[ARGP_CUR_ALIGNED:%[^,=]+]] = inttoptr i32 [[R2]] to i8*
-// CHECK: [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR_ALIGNED]], i32 8
-// CHECK: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
-// CHECK: [[R3:%[^,=]+]] = bitcast i8* [[ARGP_CUR_ALIGNED]] to i64*
-// CHECK: [[R4:%[^,=]+]] = load i64, i64* [[R3]], align 8
-// CHECK: store i64 [[R4]], i64* [[V]], align 8
-// CHECK: [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK: call void @llvm.va_end(i8* [[VA2]])
-// CHECK: [[R5:%[^,=]+]] = load i64, i64* [[V]], align 8
-// CHECK: ret i64 [[R5]]
-// CHECK: }
struct S {
int x;
@@ -70,6 +75,26 @@ struct S {
int z;
};
+// CHECK-LABEL: define {{[^@]+}}@test_struct
+// CHECK-SAME: (%struct.S* noalias sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], i8* noundef [[FMT:%.*]], ...) #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: store i8* [[FMT]], i8** [[FMT_ADDR]], align 4
+// CHECK-NEXT: [[VA1:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT: [[ARGP_CUR:%.*]] = load i8*, i8** [[VA]], align 4
+// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
+// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[ARGP_CUR]] to %struct.S**
+// CHECK-NEXT: [[TMP1:%.*]] = load %struct.S*, %struct.S** [[TMP0]], align 4
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[AGG_RESULT]] to i8*
+// CHECK-NEXT: [[TMP3:%.*]] = bitcast %struct.S* [[TMP1]] to i8*
+// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP2]], i8* align 4 [[TMP3]], i32 12, i1 false)
+// CHECK-NEXT: [[VA2:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_end(i8* [[VA2]])
+// CHECK-NEXT: ret void
+//
struct S test_struct(char *fmt, ...) {
va_list va;
@@ -80,27 +105,37 @@ struct S test_struct(char *fmt, ...) {
return v;
}
-// CHECK: define void @test_struct([[STRUCT_S:%[^,=]+]]*{{.*}} noalias sret({{.*}}) align 4 [[AGG_RESULT:%.*]], i8*{{.*}} %fmt, ...) {{.*}} {
-// CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4
-// CHECK-NEXT: [[VA:%[^,=]+]] = alloca i8*, align 4
-// CHECK-NEXT: store i8* %fmt, i8** [[FMT_ADDR]], align 4
-// CHECK-NEXT: [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
-// CHECK-NEXT: [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
-// CHECK-NEXT: [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 4
-// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
-// CHECK-NEXT: [[R3:%[^,=]+]] = bitcast i8* [[ARGP_CUR]] to [[STRUCT_S]]**
-// CHECK-NEXT: [[R4:%[^,=]+]] = load [[STRUCT_S]]*, [[STRUCT_S]]** [[R3]], align 4
-// CHECK-NEXT: [[R5:%[^,=]+]] = bitcast [[STRUCT_S]]* [[AGG_RESULT]] to i8*
-// CHECK-NEXT: [[R6:%[^,=]+]] = bitcast [[STRUCT_S]]* [[R4]] to i8*
-// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[R5]], i8* align 4 [[R6]], i32 12, i1 false)
-// CHECK-NEXT: [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT: call void @llvm.va_end(i8* [[VA2]])
-// CHECK-NEXT: ret void
-// CHECK-NEXT: }
struct Z {};
+// CHECK-LABEL: define {{[^@]+}}@test_empty_struct
+// CHECK-SAME: (%struct.S* noalias sret([[STRUCT_S:%.*]]) align 4 [[AGG_RESULT:%.*]], i8* noundef [[FMT:%.*]], ...) #[[ATTR0]] {
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[FMT_ADDR:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[VA:%.*]] = alloca i8*, align 4
+// CHECK-NEXT: [[U:%.*]] = alloca [[STRUCT_Z:%.*]], align 1
+// CHECK-NEXT: store i8* [[FMT]], i8** [[FMT_ADDR]], align 4
+// CHECK-NEXT: [[VA1:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
+// CHECK-NEXT: [[ARGP_CUR:%.*]] = load i8*, i8** [[VA]], align 4
+// CHECK-NEXT: [[ARGP_NEXT:%.*]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 0
+// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[ARGP_CUR]] to %struct.Z*
+// CHECK-NEXT: [[TMP1:%.*]] = bitcast %struct.Z* [[U]] to i8*
+// CHECK-NEXT: [[TMP2:%.*]] = bitcast %struct.Z* [[TMP0]] to i8*
+// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 [[TMP1]], i8* align 4 [[TMP2]], i32 0, i1 false)
+// CHECK-NEXT: [[ARGP_CUR2:%.*]] = load i8*, i8** [[VA]], align 4
+// CHECK-NEXT: [[ARGP_NEXT3:%.*]] = getelementptr inbounds i8, i8* [[ARGP_CUR2]], i32 4
+// CHECK-NEXT: store i8* [[ARGP_NEXT3]], i8** [[VA]], align 4
+// CHECK-NEXT: [[TMP3:%.*]] = bitcast i8* [[ARGP_CUR2]] to %struct.S**
+// CHECK-NEXT: [[TMP4:%.*]] = load %struct.S*, %struct.S** [[TMP3]], align 4
+// CHECK-NEXT: [[TMP5:%.*]] = bitcast %struct.S* [[AGG_RESULT]] to i8*
+// CHECK-NEXT: [[TMP6:%.*]] = bitcast %struct.S* [[TMP4]] to i8*
+// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP5]], i8* align 4 [[TMP6]], i32 12, i1 false)
+// CHECK-NEXT: [[VA4:%.*]] = bitcast i8** [[VA]] to i8*
+// CHECK-NEXT: call void @llvm.va_end(i8* [[VA4]])
+// CHECK-NEXT: ret void
+//
struct S test_empty_struct(char *fmt, ...) {
va_list va;
@@ -112,29 +147,3 @@ struct S test_empty_struct(char *fmt, ...) {
return v;
}
-// CHECK: define void @test_empty_struct([[STRUCT_S:%[^,=]+]]*{{.*}} noalias sret([[STRUCT_S]]) align 4 [[AGG_RESULT:%.*]], i8*{{.*}} %fmt, ...) {{.*}} {
-// CHECK: [[FMT_ADDR:%[^,=]+]] = alloca i8*, align 4
-// CHECK-NEXT: [[VA:%[^,=]+]] = alloca i8*, align 4
-// CHECK-NEXT: [[U:%[^,=]+]] = alloca [[STRUCT_Z:%[^,=]+]], align 1
-// CHECK-NEXT: store i8* %fmt, i8** [[FMT_ADDR]], align 4
-// CHECK-NEXT: [[VA1:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT: call void @llvm.va_start(i8* [[VA1]])
-// CHECK-NEXT: [[ARGP_CUR:%[^,=]+]] = load i8*, i8** [[VA]], align 4
-// CHECK-NEXT: [[ARGP_NEXT:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR]], i32 0
-// CHECK-NEXT: store i8* [[ARGP_NEXT]], i8** [[VA]], align 4
-// CHECK-NEXT: [[R0:%[^,=]+]] = bitcast i8* [[ARGP_CUR]] to [[STRUCT_Z]]*
-// CHECK-NEXT: [[R1:%[^,=]+]] = bitcast [[STRUCT_Z]]* [[U]] to i8*
-// CHECK-NEXT: [[R2:%[^,=]+]] = bitcast [[STRUCT_Z]]* [[R0]] to i8*
-// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 [[R1]], i8* align 4 [[R2]], i32 0, i1 false)
-// CHECK-NEXT: [[ARGP_CUR2:%[^,=]+]] = load i8*, i8** [[VA]], align 4
-// CHECK-NEXT: [[ARGP_NEXT2:%[^,=]+]] = getelementptr inbounds i8, i8* [[ARGP_CUR2]], i32 4
-// CHECK-NEXT: store i8* [[ARGP_NEXT2]], i8** [[VA]], align 4
-// CHECK-NEXT: [[R3:%[^,=]+]] = bitcast i8* [[ARGP_CUR2]] to [[STRUCT_S]]**
-// CHECK-NEXT: [[R4:%[^,=]+]] = load [[STRUCT_S]]*, [[STRUCT_S]]** [[R3]], align 4
-// CHECK-NEXT: [[R5:%[^,=]+]] = bitcast [[STRUCT_S]]* [[AGG_RESULT]] to i8*
-// CHECK-NEXT: [[R6:%[^,=]+]] = bitcast [[STRUCT_S]]* [[R4]] to i8*
-// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[R5]], i8* align 4 [[R6]], i32 12, i1 false)
-// CHECK-NEXT: [[VA2:%[^,=]+]] = bitcast i8** [[VA]] to i8*
-// CHECK-NEXT: call void @llvm.va_end(i8* [[VA2]])
-// CHECK-NEXT: ret void
-// CHECK-NEXT: }
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