[PATCH] D136040: [X86][1/2] Support PREFETCHI instructions
Craig Topper via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Oct 18 21:01:22 PDT 2022
craig.topper added inline comments.
================
Comment at: clang/lib/Headers/prfchiintrin.h:16
+/// Loads an instruction sequence containing the specified memory address into
+/// all level cache.
+///
----------------
craig.topper wrote:
> It looks old that this indented differently than the "Loads" on the line above.
That should have said "It looks ODD that this indented differently..."
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136040/new/
https://reviews.llvm.org/D136040
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