[PATCH] D136145: [IR][RFC] Restrict read only when cache type of llvm.prefetch is instruction

[Phoebe Wang via Phabricator via cfe-commits]

pengfei updated this revision to Diff 468486.
pengfei marked an inline comment as done.
pengfei added a comment.

Remove instruction write prefetch test from SystemZ.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136145/new/

https://reviews.llvm.org/D136145

Files:
  clang/include/clang/Basic/DiagnosticSemaKinds.td
  clang/lib/CodeGen/CGBuiltin.cpp
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-arm.c
  clang/test/Sema/builtin-prefetch.c
  llvm/docs/LangRef.rst
  llvm/lib/IR/Verifier.cpp
  llvm/lib/Target/X86/X86Instr3DNow.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/test/CodeGen/SystemZ/prefetch-01.ll
  llvm/test/CodeGen/X86/prefetch.ll

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