[clang] 0d0ca64 - [AArch64] Make ACLE intrinsics always available part MTE
Daniel Kiss via cfe-commits
cfe-commits at lists.llvm.org
Tue Oct 18 02:03:09 PDT 2022
Author: Daniel Kiss
Date: 2022-10-18T11:03:02+02:00
New Revision: 0d0ca64356ff1a9e3427660732da033a14521e5b
URL: https://github.com/llvm/llvm-project/commit/0d0ca64356ff1a9e3427660732da033a14521e5b
DIFF: https://github.com/llvm/llvm-project/commit/0d0ca64356ff1a9e3427660732da033a14521e5b.diff
LOG: [AArch64] Make ACLE intrinsics always available part MTE
Make MTE intrinsics available in function scope too.
Followup from D133359.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D136062
Added:
Modified:
clang/include/clang/Basic/BuiltinsAArch64.def
clang/lib/Headers/arm_acle.h
clang/test/CodeGen/aarch64-mops.c
clang/test/CodeGen/arm64-mte.c
clang/test/Sema/builtins-arm64-mte.c
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/BuiltinsAArch64.def b/clang/include/clang/Basic/BuiltinsAArch64.def
index e6e375bc2b83a..bc8ab4eade91a 100644
--- a/clang/include/clang/Basic/BuiltinsAArch64.def
+++ b/clang/include/clang/Basic/BuiltinsAArch64.def
@@ -59,15 +59,15 @@ TARGET_BUILTIN(__builtin_arm_crc32d, "UiUiWUi", "nc", "crc")
TARGET_BUILTIN(__builtin_arm_crc32cd, "UiUiWUi", "nc", "crc")
// Memory Tagging Extensions (MTE)
-BUILTIN(__builtin_arm_irg, "v*v*Ui", "t")
-BUILTIN(__builtin_arm_addg, "v*v*Ui", "t")
-BUILTIN(__builtin_arm_gmi, "Uiv*Ui", "t")
-BUILTIN(__builtin_arm_ldg, "v*v*", "t")
-BUILTIN(__builtin_arm_stg, "vv*", "t")
-BUILTIN(__builtin_arm_subp, "Uiv*v*", "t")
+TARGET_BUILTIN(__builtin_arm_irg, "v*v*Ui", "t", "mte")
+TARGET_BUILTIN(__builtin_arm_addg, "v*v*Ui", "t", "mte")
+TARGET_BUILTIN(__builtin_arm_gmi, "Uiv*Ui", "t", "mte")
+TARGET_BUILTIN(__builtin_arm_ldg, "v*v*", "t", "mte")
+TARGET_BUILTIN(__builtin_arm_stg, "vv*", "t", "mte")
+TARGET_BUILTIN(__builtin_arm_subp, "Uiv*v*", "t", "mte")
// Memory Operations
-BUILTIN(__builtin_arm_mops_memset_tag, "v*v*iz", "")
+TARGET_BUILTIN(__builtin_arm_mops_memset_tag, "v*v*iz", "", "mte,mops")
// Memory barrier
BUILTIN(__builtin_arm_dmb, "vUi", "nc")
diff --git a/clang/lib/Headers/arm_acle.h b/clang/lib/Headers/arm_acle.h
index d73b6bf82d699..b30010274392c 100644
--- a/clang/lib/Headers/arm_acle.h
+++ b/clang/lib/Headers/arm_acle.h
@@ -722,17 +722,15 @@ __arm_st64bv0(void *__addr, data512_t __value) {
#define __arm_wsrf64(sysreg, v) __arm_wsr64(sysreg, __builtin_bit_cast(uint64_t, v))
/* Memory Tagging Extensions (MTE) Intrinsics */
-#if defined(__ARM_FEATURE_MEMORY_TAGGING) && __ARM_FEATURE_MEMORY_TAGGING
+#if defined(__ARM_64BIT_STATE) && __ARM_64BIT_STATE
#define __arm_mte_create_random_tag(__ptr, __mask) __builtin_arm_irg(__ptr, __mask)
#define __arm_mte_increment_tag(__ptr, __tag_offset) __builtin_arm_addg(__ptr, __tag_offset)
#define __arm_mte_exclude_tag(__ptr, __excluded) __builtin_arm_gmi(__ptr, __excluded)
#define __arm_mte_get_tag(__ptr) __builtin_arm_ldg(__ptr)
#define __arm_mte_set_tag(__ptr) __builtin_arm_stg(__ptr)
#define __arm_mte_ptr
diff (__ptra, __ptrb) __builtin_arm_subp(__ptra, __ptrb)
-#endif
/* Memory Operations Intrinsics */
-#if defined(__ARM_FEATURE_MOPS) && __ARM_FEATURE_MOPS && defined(__ARM_FEATURE_MEMORY_TAGGING) && __ARM_FEATURE_MEMORY_TAGGING
#define __arm_mops_memset_tag(__tagged_address, __value, __size) \
__builtin_arm_mops_memset_tag(__tagged_address, __value, __size)
#endif
diff --git a/clang/test/CodeGen/aarch64-mops.c b/clang/test/CodeGen/aarch64-mops.c
index f7efb1635185d..c0f151837c751 100644
--- a/clang/test/CodeGen/aarch64-mops.c
+++ b/clang/test/CodeGen/aarch64-mops.c
@@ -1,77 +1,68 @@
// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -target-feature +mops -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-MOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -target-feature +mops -Wno-implicit-function-declaration -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -Wno-implicit-function-declaration -target-feature +mte -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
-// RUN: %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -Wno-implicit-function-declaration -w -S -emit-llvm -o - %s | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: not %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -target-feature +mops -Wno-implicit-function-declaration -w -S -emit-llvm -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: not %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -Wno-implicit-function-declaration -target-feature +mte -w -S -emit-llvm -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NOMOPS %s
+// RUN: not %clang_cc1 -triple aarch64-arm-unknown-eabi -Wno-int-conversion -Wno-implicit-function-declaration -w -S -emit-llvm -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NOMOPS %s
#include <arm_acle.h>
#include <stddef.h>
// CHECK-LABEL: @bzero_0(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
+// CHECK-NOMOPS: '__builtin_arm_mops_memset_tag' needs target feature mte,mops
void *bzero_0(void *dst) {
return __arm_mops_memset_tag(dst, 0, 0);
}
// CHECK-LABEL: @bzero_1(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_1(void *dst) {
return __arm_mops_memset_tag(dst, 0, 1);
}
// CHECK-LABEL: @bzero_10(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_10(void *dst) {
return __arm_mops_memset_tag(dst, 0, 10);
}
// CHECK-LABEL: @bzero_10000(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_10000(void *dst) {
return __arm_mops_memset_tag(dst, 0, 10000);
}
// CHECK-LABEL: @bzero_n(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *bzero_n(void *dst, size_t size) {
return __arm_mops_memset_tag(dst, 0, size);
}
// CHECK-LABEL: @memset_0(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *memset_0(void *dst, int value) {
return __arm_mops_memset_tag(dst, value, 0);
}
// CHECK-LABEL: @memset_1(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *memset_1(void *dst, int value) {
return __arm_mops_memset_tag(dst, value, 1);
}
// CHECK-LABEL: @memset_10(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *memset_10(void *dst, int value) {
return __arm_mops_memset_tag(dst, value, 10);
}
// CHECK-LABEL: @memset_10000(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *memset_10000(void *dst, int value) {
return __arm_mops_memset_tag(dst, value, 10000);
}
// CHECK-LABEL: @memset_n(
// CHECK-MOPS: @llvm.aarch64.mops.memset.tag
-// CHECK-NOMOPS-NOT: @llvm.aarch64.mops.memset.tag
void *memset_n(void *dst, int value, size_t size) {
return __arm_mops_memset_tag(dst, value, size);
}
diff --git a/clang/test/CodeGen/arm64-mte.c b/clang/test/CodeGen/arm64-mte.c
index 12b568b2ece76..1c65d6a626dda 100644
--- a/clang/test/CodeGen/arm64-mte.c
+++ b/clang/test/CodeGen/arm64-mte.c
@@ -1,9 +1,17 @@
// Test memory tagging extension intrinsics
// RUN: %clang_cc1 -triple aarch64-none-linux-eabi -target-feature +mte -O3 -S -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-none-linux-eabi -DMTE -O3 -S -emit-llvm -o - %s | FileCheck %s
#include <stddef.h>
#include <arm_acle.h>
+#ifdef MTE
+#define attribute __attribute__((target("mte")))
+#else
+#define attribute
+#endif
+
// CHECK-LABEL: define{{.*}} ptr @create_tag1
+attribute
int *create_tag1(int *a, unsigned b) {
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
// CHECK: [[T2:%[0-9]+]] = tail call ptr @llvm.aarch64.irg(ptr %a, i64 [[T1]])
@@ -11,6 +19,7 @@ int *create_tag1(int *a, unsigned b) {
}
// CHECK-LABEL: define{{.*}} ptr @create_tag2
+attribute
short *create_tag2(short *a, unsigned b) {
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
// CHECK: [[T2:%[0-9]+]] = tail call ptr @llvm.aarch64.irg(ptr %a, i64 [[T1]])
@@ -18,6 +27,7 @@ short *create_tag2(short *a, unsigned b) {
}
// CHECK-LABEL: define{{.*}} ptr @create_tag3
+attribute
char *create_tag3(char *a, unsigned b) {
// CHECK: [[T1:%[0-9]+]] = zext i32 %b to i64
// CHECK: [[T2:%[0-9]+]] = tail call ptr @llvm.aarch64.irg(ptr %a, i64 [[T1]])
@@ -26,18 +36,21 @@ char *create_tag3(char *a, unsigned b) {
}
// CHECK-LABEL: define{{.*}} ptr @increment_tag1
+attribute
char *increment_tag1(char *a) {
// CHECK: call ptr @llvm.aarch64.addg(ptr %a, i64 3)
return __arm_mte_increment_tag(a,3);
}
// CHECK-LABEL: define{{.*}} ptr @increment_tag2
+attribute
short *increment_tag2(short *a) {
// CHECK: [[T1:%[0-9]+]] = tail call ptr @llvm.aarch64.addg(ptr %a, i64 3)
return __arm_mte_increment_tag(a,3);
}
// CHECK-LABEL: define{{.*}} i32 @exclude_tag
+attribute
unsigned exclude_tag(int *a, unsigned m) {
// CHECK: [[T0:%[0-9]+]] = zext i32 %m to i64
// CHECK: [[T2:%[0-9]+]] = tail call i64 @llvm.aarch64.gmi(ptr %a, i64 [[T0]])
@@ -46,24 +59,28 @@ unsigned exclude_tag(int *a, unsigned m) {
}
// CHECK-LABEL: define{{.*}} ptr @get_tag1
+attribute
int *get_tag1(int *a) {
// CHECK: [[T1:%[0-9]+]] = tail call ptr @llvm.aarch64.ldg(ptr %a, ptr %a)
return __arm_mte_get_tag(a);
}
// CHECK-LABEL: define{{.*}} ptr @get_tag2
+attribute
short *get_tag2(short *a) {
// CHECK: [[T1:%[0-9]+]] = tail call ptr @llvm.aarch64.ldg(ptr %a, ptr %a)
return __arm_mte_get_tag(a);
}
// CHECK-LABEL: define{{.*}} void @set_tag1
+attribute
void set_tag1(int *a) {
// CHECK: tail call void @llvm.aarch64.stg(ptr %a, ptr %a)
__arm_mte_set_tag(a);
}
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers
+attribute
ptr
diff _t subtract_pointers(int *a, int *b) {
// CHECK: [[T2:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(ptr %a, ptr %b)
// CHECK: ret i64 [[T2]]
@@ -71,6 +88,7 @@ ptr
diff _t subtract_pointers(int *a, int *b) {
}
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_1
+attribute
ptr
diff _t subtract_pointers_null_1(int *a) {
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(ptr %a, ptr null)
// CHECK: ret i64 [[T1]]
@@ -78,6 +96,7 @@ ptr
diff _t subtract_pointers_null_1(int *a) {
}
// CHECK-LABEL: define{{.*}} i64 @subtract_pointers_null_2
+attribute
ptr
diff _t subtract_pointers_null_2(int *a) {
// CHECK: [[T1:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(ptr null, ptr %a)
// CHECK: ret i64 [[T1]]
@@ -86,6 +105,7 @@ ptr
diff _t subtract_pointers_null_2(int *a) {
// Check arithmetic promotion on return type
// CHECK-LABEL: define{{.*}} i32 @subtract_pointers4
+attribute
int subtract_pointers4(void* a, void *b) {
// CHECK: [[T0:%[0-9]+]] = tail call i64 @llvm.aarch64.subp(ptr %a, ptr %b)
// CHECK-NEXT: %cmp = icmp slt i64 [[T0]], 1
diff --git a/clang/test/Sema/builtins-arm64-mte.c b/clang/test/Sema/builtins-arm64-mte.c
index b283b854532ea..11787cf55fdb4 100644
--- a/clang/test/Sema/builtins-arm64-mte.c
+++ b/clang/test/Sema/builtins-arm64-mte.c
@@ -1,8 +1,10 @@
// RUN: %clang_cc1 -triple arm64-arm-eabi %s -target-feature +mte -fsyntax-only -verify
// RUN: %clang_cc1 -triple arm64-arm-eabi %s -target-feature +mte -x c++ -fsyntax-only -verify
+// RUN: %clang_cc1 -triple arm64-arm-eabi %s -DNO_MTE -x c++ -S -emit-llvm -verify
#include <stddef.h>
#include <arm_acle.h>
+#ifndef NO_MTE
int *create_tag1(int a, unsigned b) {
// expected-error at +1 {{first argument of MTE builtin function must be a pointer ('int' invalid)}}
return __arm_mte_create_random_tag(a,b);
@@ -134,3 +136,10 @@ ptr
diff _t subtract_pointers5() {
return __arm_mte_ptr
diff (nullptr, nullptr);
}
#endif
+
+#else
+int *create_tag1(int *a, unsigned b) {
+ // expected-error at +1 {{'__builtin_arm_irg' needs target feature mte}}
+ return __arm_mte_create_random_tag(a,b);
+}
+#endif
\ No newline at end of file
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