[PATCH] D121779: [RISCV] Add zihintntl compressed instructions
Cao Shun via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 23 23:29:22 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
alextsao1999 marked an inline comment as done.
Closed by commit rG07a700f814bf: [RISCV] Add zihintntl compressed instructions (authored by alextsao1999).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D121779/new/
https://reviews.llvm.org/D121779
Files:
llvm/lib/Target/RISCV/RISCVInstrInfoC.td
llvm/test/MC/RISCV/attribute-arch.s
llvm/test/MC/RISCV/rv32zihintntl-invalid.s
llvm/test/MC/RISCV/rv32zihintntlc-invalid.s
llvm/test/MC/RISCV/rv32zihintntlc-valid.s
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