[PATCH] D128711: [clang-format] Handle Verilog blocks

[sstwcw via Phabricator via cfe-commits]

sstwcw created this revision.
sstwcw added reviewers: HazardyKnusperkeks, MyDeveloperDay, curdeius, owenpan.
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Now stuff inside begin-end blocks get indented.

Some tests are moved into FormatTestVerilog.Block from
FormatTestVerilog.If because they have nothing to do with if statements.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D128711

Files:
  clang/lib/Format/FormatToken.h
  clang/lib/Format/TokenAnnotator.cpp
  clang/lib/Format/UnwrappedLineParser.cpp
  clang/unittests/Format/FormatTestVerilog.cpp
  clang/unittests/Format/TokenAnnotatorTest.cpp

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