[PATCH] D125875: [RISCV] Add vread_csr and vwrite_csr to riscv_vector.h

[Wang Pengcheng via Phabricator via cfe-commits]

pcwang-thead added inline comments.


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Comment at: clang/include/clang/Basic/riscv_vector.td:1511
+__extension__ extern __inline
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+unsigned long vread_csr(enum RVV_CSR csr) {
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craig.topper wrote:
> Do we need __gnu_inline__ and __artificial__? The only intrinsics headers that have them in clang are in ppc_wrappers. X86 uses `__attribute__((__always_inline__, __nodebug__`
I just made it the same as GCC.


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Comment at: clang/include/clang/Basic/riscv_vector.td:1512
+__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
+unsigned long vread_csr(enum RVV_CSR csr) {
+  unsigned long rv = 0;
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craig.topper wrote:
> X86 and arm_neon.h uses double underscore prefixes on all variables in intrinsic headers to reduce the chance of a collision with a user having a macro with the same name.
The function prototypes have already been defined in RVV intrinsics doc (https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-api.md#readwrite-urw-vector-csrs).


Repository:
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  https://reviews.llvm.org/D125875/new/

https://reviews.llvm.org/D125875