[PATCH] D124700: [AMDGPU] Add llvm.amdgcn.sched.barrier intrinsic

Fri Apr 29 17:23:09 PDT 2022

kerbowa added a comment.

In D124700#3483633 <https://reviews.llvm.org/D124700#3483633>, @rampitec wrote:

> In D124700#3483609 <https://reviews.llvm.org/D124700#3483609>, @kerbowa wrote:
>
>> In D124700#3483556 <https://reviews.llvm.org/D124700#3483556>, @rampitec wrote:
>>
>>> You do not handle masks other than 0 yet?
>>
>> We handle 0 and 1 only.
>
> Do you mean 1 is supported simply because it has side effects? If I understand it right you will need to remove this to support more flexible masks, right?

Yes.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124700/new/

https://reviews.llvm.org/D124700