[PATCH] D118333: [RISCV] Use computeTargetABI from llc as well as clang

[Zakk Chen via Phabricator via cfe-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG4e115b7d8811: [RISCV] Update computeTargetABI from llc as well as clang (authored by khchen).

Changed prior to commit:
  https://reviews.llvm.org/D118333?vs=406842&id=411315#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118333/new/

https://reviews.llvm.org/D118333

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
  llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
  llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
  llvm/test/CodeGen/RISCV/double-calling-conv.ll
  llvm/test/CodeGen/RISCV/double-previous-failure.ll
  llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
  llvm/test/CodeGen/RISCV/fastcc-float.ll
  llvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
  llvm/test/CodeGen/RISCV/inline-asm-clobbers.ll
  llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
  llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
  llvm/test/CodeGen/RISCV/mattr-invalid-combination.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
  llvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
  llvm/test/CodeGen/RISCV/select-const.ll
  llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
  llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
  llvm/test/MC/RISCV/mattr-invalid-combination.s

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