[PATCH] D119876: [nfc][codegen] Move RegisterBank[Info].h under CodeGen

[Mircea Trofin via Phabricator via cfe-commits]

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This wraps up from D119053 <https://reviews.llvm.org/D119053>. The 2 headers are moved as described,
fixed file headers and include guards, updated all files where the old
paths were detected (simple grep through the repo), and `clang-format`-ed it all.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D119876

Files:
  clang/docs/tools/clang-formatted-files.txt
  llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
  llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
  llvm/include/llvm/CodeGen/GlobalISel/RegisterBank.h
  llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h
  llvm/include/llvm/CodeGen/MachineRegisterInfo.h
  llvm/include/llvm/CodeGen/RegisterBank.h
  llvm/include/llvm/CodeGen/RegisterBankInfo.h
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
  llvm/lib/CodeGen/GlobalISel/Utils.cpp
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/lib/CodeGen/MIRPrinter.cpp
  llvm/lib/CodeGen/MachineInstr.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/CodeGen/RegisterBank.cpp
  llvm/lib/CodeGen/RegisterBankInfo.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
  llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
  llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
  llvm/lib/Target/ARM/ARMRegisterBankInfo.h
  llvm/lib/Target/ARM/ARMSubtarget.h
  llvm/lib/Target/ARM/ARMTargetMachine.cpp
  llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.cpp
  llvm/lib/Target/M68k/GISel/M68kRegisterBankInfo.h
  llvm/lib/Target/M68k/M68kSubtarget.h
  llvm/lib/Target/Mips/MipsRegisterBankInfo.h
  llvm/lib/Target/Mips/MipsSubtarget.h
  llvm/lib/Target/PowerPC/GISel/PPCRegisterBankInfo.h
  llvm/lib/Target/PowerPC/PPCSubtarget.h
  llvm/lib/Target/RISCV/RISCVRegisterBankInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterBankInfo.h
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/lib/Target/X86/X86InstructionSelector.cpp
  llvm/lib/Target/X86/X86RegisterBankInfo.cpp
  llvm/lib/Target/X86/X86RegisterBankInfo.h

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