[PATCH] D117989: [RISCV] Add the passthru operand for RVV nomask binary intrinsics.

[Craig Topper via Phabricator via cfe-commits]

craig.topper added inline comments.


================
Comment at: clang/include/clang/Basic/riscv_vector.td:181
+  // The nomask intrinsic IR have the passthru operand.
+  bit HasNoMaskPolicy = false;
+
----------------
Should this be `HasNoMaskPassThru` rather than `Policy`?


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4733
     } else {
-      Vec = DAG.getNode(RISCVISD::VSLIDE1DOWN_VL, DL, I32VT, Vec, ScalarLo,
-                        I32Mask, I32VL);
-      Vec = DAG.getNode(RISCVISD::VSLIDE1DOWN_VL, DL, I32VT, Vec, ScalarHi,
-                        I32Mask, I32VL);
+      // TODO Those VSLDIE1 could be TAMA because we use vmerge to select maskedoff
+      SDValue Undef = DAG.getUNDEF(I32VT);
----------------
VSLDIE1 -> VSLIDE1

Fix the clang-format warning


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:4760
+    if (MaskedOff.isUndef()) {
+      assert(Policy == (RISCVII::TAIL_AGNOSTIC | RISCVII::MASK_AGNOSTIC) &&
+             "Invalid policy, undef maskedoff need to have tail and mask "
----------------
I don't think you can assert the policy here. The mask can be folded to undef without the user knowing.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/masked-vslide1down-rv32.ll:56
+
+; Fallback vslide1 to mask undisturbed untill InsertVSETVLI supports mask agnostic.
+define <vscale x 1 x i64> @intrinsic_vslide1down_mask_tuma_vx_nxv1i64_nxv1i64_i64(<vscale x 1 x i64> %0, <vscale x 1 x i64> %1, i64 %2, <vscale x 1 x i1> %3, i32 %4) nounwind {
----------------
untill -> until


================
Comment at: llvm/test/CodeGen/RISCV/rvv/masked-vslide1down-rv32.ll:78
+
+; Fallback vslide1 to mask undisturbed untill InsertVSETVLI supports mask agnostic.
+define <vscale x 1 x i64> @intrinsic_vslide1down_mask_tama_vx_nxv1i64_nxv1i64_i64(<vscale x 1 x i64> %0, i64 %1, <vscale x 1 x i1> %2, i32 %3) nounwind {
----------------
untill -> until


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D117989/new/

https://reviews.llvm.org/D117989