[PATCH] D113336: [RISCV] Imply extensions in RISCVTargetInfo::initFeatureMap
Yueh-Ting Chen via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Thu Jan 20 01:10:40 PST 2022
eopXD updated this revision to Diff 401541.
eopXD marked an inline comment as done.
eopXD added a comment.
Update code based on @kito-cheng 's comment.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113336/new/
https://reviews.llvm.org/D113336
Files:
clang/lib/Basic/Targets/RISCV.cpp
llvm/include/llvm/Support/RISCVISAInfo.h
llvm/lib/Support/RISCVISAInfo.cpp
Index: llvm/lib/Support/RISCVISAInfo.cpp
===================================================================
--- llvm/lib/Support/RISCVISAInfo.cpp
+++ llvm/lib/Support/RISCVISAInfo.cpp
@@ -881,3 +881,17 @@
return Arch.str();
}
+
+std::vector<std::string> RISCVISAInfo::toFeatureVector() const {
+ std::vector<std::string> FeatureVector;
+ for (auto Ext : Exts) {
+ std::string ExtName = Ext.first;
+ if (ExtName == "i") // i is not recognized in clang -cc1
+ continue;
+ std::string Feature = isExperimentalExtension(ExtName)
+ ? "+experimental-" + ExtName
+ : "+" + ExtName;
+ FeatureVector.push_back(Feature);
+ }
+ return FeatureVector;
+}
Index: llvm/include/llvm/Support/RISCVISAInfo.h
===================================================================
--- llvm/include/llvm/Support/RISCVISAInfo.h
+++ llvm/include/llvm/Support/RISCVISAInfo.h
@@ -67,6 +67,7 @@
bool hasExtension(StringRef Ext) const;
std::string toString() const;
+ std::vector<std::string> toFeatureVector() const;
static bool isSupportedExtensionFeature(StringRef Ext);
static bool isSupportedExtension(StringRef Ext);
Index: clang/lib/Basic/Targets/RISCV.cpp
===================================================================
--- clang/lib/Basic/Targets/RISCV.cpp
+++ clang/lib/Basic/Targets/RISCV.cpp
@@ -214,10 +214,26 @@
llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
const std::vector<std::string> &FeaturesVec) const {
- if (getTriple().getArch() == llvm::Triple::riscv64)
+ unsigned XLen = 32;
+
+ if (getTriple().getArch() == llvm::Triple::riscv64) {
Features["64bit"] = true;
+ XLen = 64;
+ }
+
+ auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
+ if (!ParseResult) {
+ std::string Buffer;
+ llvm::raw_string_ostream OutputErrMsg(Buffer);
+ handleAllErrors(ParseResult.takeError(), [&](llvm::StringError &ErrMsg) {
+ OutputErrMsg << ErrMsg.getMessage();
+ });
+ Diags.Report(diag::err_invalid_feature_combination) << OutputErrMsg.str();
+ return false;
+ }
- return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
+ return TargetInfo::initFeatureMap(Features, Diags, CPU,
+ (*ParseResult)->toFeatureVector());
}
/// Return true if has this feature, need to sync with handleTargetFeatures.
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