[PATCH] D113336: [RISCV] Imply extensions in RISCVTargetInfo::initFeatureMap

Kito Cheng via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Thu Jan 20 00:59:01 PST 2022


kito-cheng accepted this revision.
kito-cheng added a comment.
This revision is now accepted and ready to land.

Otherwise LGTM.



================
Comment at: clang/lib/Basic/Targets/RISCV.cpp:220
 
-  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
+  unsigned XLen = Features["64bit"] ? 64 : 32;
+  auto ParseResult = llvm::RISCVISAInfo::parseFeatures(XLen, FeaturesVec);
----------------
Maybe update XLen based on the if condition? that might save one StringMap query.
```
  unsigned XLen = 32;

  if (getTriple().getArch() == llvm::Triple::riscv64) {
    Features["64bit"] = true;
    XLen = 64;
  }
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113336/new/

https://reviews.llvm.org/D113336



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