[PATCH] D112408: [WIP][RISCV] Add the zve extension according to the v1.0-rc2 spec

[Fraser Cormack via Phabricator via cfe-commits]

frasercrmck added a comment.

Don't we need to teach ISel some tricks before we consider these extensions supported? E.g., we need to stop i64 vectors being legal under zve32x or zve32f.



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Comment at: llvm/lib/Target/RISCV/RISCV.td:182
 
+def FeatureExtZve32x
+    : SubtargetFeature<"experimental-zve32x", "HasStdExtZve32x", "true",
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Do we need to define distinct `SubtargetFeature`s for each of these extensions or could they be broken down into a single `MaxEEW` feature (32 or 64) in conjunction with the pre-existing F/D features. This seems like it's more complicated than it needs to be.


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Comment at: llvm/lib/Target/RISCV/RISCVSubtarget.h:141
+  // either v or zve* suppaort v instructions
+  bool hasStdExtV() const { return HasStdExtV || HasStdExtZve32x; }
+  bool hasStdExtZve32x() const { return HasStdExtZve32x; }
----------------
Is this correct? I thought we'd keep `hasStdExtV` as being the single-letter V extension, and Zve32x isn't that.


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Comment at: llvm/test/CodeGen/RISCV/attributes.ll:8
 ; RUN: llc -mtriple=riscv32 -mattr=+c %s -o - | FileCheck --check-prefix=RV32C %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+experimental-zvamo,+experimental-zvlsseg %s -o - | FileCheck --check-prefix=RV32V %s
+; RUN: llc -mtriple=riscv32 -mattr=+f,+d,+experimental-v,+experimental-zvamo,+experimental-zvlsseg %s -o - | FileCheck --check-prefix=RV32V %s
 ; RUN: llc -mtriple=riscv32 -mattr=+experimental-zfh %s -o - | FileCheck --check-prefix=RV32ZFH %s
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Why is this being changed in this patch?


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Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll:158
 ; CHECK-NEXT:    vmv.x.s a0, v8
+; CHECK-NEXT:    lui a1, 1048560
+; CHECK-NEXT:    or a0, a0, a1
----------------
What's going on here, do you know?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112408/new/

https://reviews.llvm.org/D112408