[PATCH] D111229: [PowerPC][Builtin] Allowing __rlwnm to accept a variable as a shift parameter

[Kamau Bridgeman via Phabricator via cfe-commits]

kamaub updated this revision to Diff 379149.
kamaub added a comment.

Adding shift variable test case to `builtins-ppc-xlcompat-rotate.c` as per
review comment request.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D111229/new/

https://reviews.llvm.org/D111229

Files:
  clang/include/clang/Basic/BuiltinsPPC.def
  clang/lib/Sema/SemaChecking.cpp
  clang/test/CodeGen/builtins-ppc-xlcompat-error.c
  clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c


Index: clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-rotate.c
@@ -56,6 +56,22 @@
   unsigned int res = __builtin_ppc_rlwnm(ui, 31, 0x1FF);
 }
 
+void test_builtin_ppc_rlwnm2(unsigned int shift) {
+  // CHECK-LABEL: test_builtin_ppc_rlwnm2
+  // CHECK:       %shift.addr = alloca i32, align 4
+  // CHECK-NEXT:  %res = alloca i32, align 4
+  // CHECK-NEXT:  store i32 %shift, i32* %shift.addr, align 4
+  // CHECK-NEXT:  [[RA:%[0-9]+]] = load i32, i32* @ui, align 4
+  // CHECK-NEXT:  [[RB:%[0-9]+]] = load i32, i32* %shift.addr, align 4
+  // CHECK-NEXT:  [[RC:%[0-9]+]] = call i32 @llvm.fshl.i32(i32 [[RA]], i32 [[RA]], i32 [[RB]])
+  // CHECK-NEXT:  [[RD:%[0-9]+]] = and i32 [[RC]], 511
+  // CHECK-NEXT:  store i32 [[RD]], i32* %res, align 4
+  // CHECK-NEXT:  ret void
+
+  /*shift = 31, mask = 0x1FF = 511*/
+  unsigned int res = __builtin_ppc_rlwnm(ui, shift, 0x1FF);
+}
+
 // CHECK-LABEL: @testrotatel4(
 // CHECK:         [[TMP:%.*]] = call i32 @llvm.fshl.i32(i32 {{%.*}}, i32 {{%.*}}, i32 {{%.*}})
 // CHECK-NEXT:    ret i32 [[TMP]]
Index: clang/test/CodeGen/builtins-ppc-xlcompat-error.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-xlcompat-error.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-error.c
@@ -41,10 +41,8 @@
 }
 
 void test_builtin_ppc_rlwnm() {
-  unsigned int shift;
   unsigned int mask;
-  unsigned int res = __builtin_ppc_rlwnm(ui, shift, 7); // expected-error {{argument to '__builtin_ppc_rlwnm' must be a constant integer}}
-  res = __builtin_ppc_rlwnm(ui, 31, mask);              // expected-error {{argument to '__builtin_ppc_rlwnm' must be a constant integer}}
+  unsigned int res = __builtin_ppc_rlwnm(ui, 31, mask);              // expected-error {{argument to '__builtin_ppc_rlwnm' must be a constant integer}}
   res = __builtin_ppc_rlwnm(ui, 31, 0xFF0F0F00);        // expected-error {{argument 2 value should represent a contiguous bit field}}
 }
 
Index: clang/lib/Sema/SemaChecking.cpp
===================================================================
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3432,8 +3432,7 @@
   // For __rlwnm, __rlwimi and __rldimi, the last parameter mask must
   // be a constant that represents a contiguous bit field.
   case PPC::BI__builtin_ppc_rlwnm:
-    return SemaBuiltinConstantArg(TheCall, 1, Result) ||
-           SemaValueIsRunOfOnes(TheCall, 2);
+    return SemaValueIsRunOfOnes(TheCall, 2);
   case PPC::BI__builtin_ppc_rlwimi:
   case PPC::BI__builtin_ppc_rldimi:
     return SemaBuiltinConstantArg(TheCall, 2, Result) ||
Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -117,7 +117,7 @@
 BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "")
 BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "")
 // Rotate
-BUILTIN(__builtin_ppc_rlwnm, "UiUiIUiIUi", "")
+BUILTIN(__builtin_ppc_rlwnm, "UiUiUiIUi", "")
 BUILTIN(__builtin_ppc_rlwimi, "UiUiUiIUiIUi", "")
 BUILTIN(__builtin_ppc_rldimi, "ULLiULLiULLiIUiIULLi", "")
 // load


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