[PATCH] D103668: [PowerPC] Implement trap and conversion builtins for XL compatibility

[Nemanja Ivanovic via Phabricator via cfe-commits]

nemanjai requested changes to this revision.
nemanjai added inline comments.
This revision now requires changes to proceed.


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Comment at: llvm/lib/Target/PowerPC/PPCInstr64Bit.td:1733
+// as XL produces a tweq <regA>, <regA>.
+def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, 31),
+          (TD 4, $A, $B)>;
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This is supposed to be an unconditional trap and the produced sequence is not that.


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  https://reviews.llvm.org/D103668/new/

https://reviews.llvm.org/D103668