[PATCH] D100448: [RISCV][Clang] Add RVV AMO builtins

[Zakk Chen via Phabricator via cfe-commits]

khchen added inline comments.


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Comment at: clang/include/clang/Basic/riscv_vector.td:749
+  foreach type = type_list in
+    foreach eew_list = [["8", "(Log2EEW:3)"], ["16", "(Log2EEW:4)"],
+                        ["32", "(Log2EEW:5)"], ["64", "(Log2EEW:6)"]] in {
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`foreach eew_list = EEWList in {`


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Comment at: clang/include/clang/Basic/riscv_vector.td:766
+            Ops[0] = Builder.CreateBitCast(Ops[0],
+              llvm::PointerType::getUnqual(ResultType));
+          }] in {
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`ResultType->getPointerTo()`


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Comment at: clang/include/clang/Basic/riscv_vector.td:770
+          def : RVVBuiltin<"v", "vPe" # eew_index # "Uvv", type>;
+        if !and(!ne(type, "f"), !ne(type, "d"), has_unsigned) then
+          def : RVVBuiltin<"Uv", "UvPUe" # eew_index # "UvUv", type>;
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`if !and(!not(IsFloat<type>.val), has_unsigned) then`


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D100448/new/

https://reviews.llvm.org/D100448