[PATCH] D98616: [RISCV] Add inline asm constraint 'v' in Clang for RISC-V 'V'.

Kito Cheng via Phabricator via cfe-commits cfe-commits at lists.llvm.org
Mon Mar 15 08:08:27 PDT 2021


kito-cheng added a comment.

Provide more implementation detail on GCC,

- if a letter are used as a prefix of multi-char constraint, then it can't be used as a single letter constraint
  - e.g. If we defined `vr` and `vm` then we can't define `v` as constraint
- constraint with same prefix should have same length
  - e.g. If we defined `vr` and `vm` then we can't define `vrr` since has different length.

And in fact we have defined bunch of predicate prefixed with `v`[1], but I am open mind to change if needed that since GCC didn't upstream that yet.

[1] https://github.com/riscv/riscv-gcc/blob/riscv-gcc-10.1-rvv-dev/gcc/config/riscv/constraints.md#L117


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D98616/new/

https://reviews.llvm.org/D98616



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