[PATCH] D95016: [Clang][RISCV] Add custom TableGen backend for riscv-vector intrinsics.
Jim Lin via Phabricator via cfe-commits
cfe-commits at lists.llvm.org
Mon Feb 8 22:14:58 PST 2021
Jim added inline comments.
================
Comment at: clang/include/clang/Basic/BuiltinsRISCV.def:2
-RISCVV_BUILTIN(vadd_vv_i8m1_vl, "q8Scq8Scq8Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m1_m_vl, "q8Scq8bq8Scq8Scq8Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m1_vl, "q4Ssq4Ssq4Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m1_m_vl, "q4Ssq4bq4Ssq4Ssq4Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m1_vl, "q2Siq2Siq2Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m1_m_vl, "q2Siq2bq2Siq2Siq2Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m1_vl, "q1SWiq1SWiq1SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m1_m_vl, "q1SWiq1bq1SWiq1SWiq1SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m2_vl, "q16Scq16Scq16Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m2_m_vl, "q16Scq16bq16Scq16Scq16Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m2_vl, "q8Ssq8Ssq8Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m2_m_vl, "q8Ssq8bq8Ssq8Ssq8Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m2_vl, "q4Siq4Siq4Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m2_m_vl, "q4Siq4bq4Siq4Siq4Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m2_vl, "q2SWiq2SWiq2SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m2_m_vl, "q2SWiq2bq2SWiq2SWiq2SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m4_vl, "q32Scq32Scq32Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m4_m_vl, "q32Scq32bq32Scq32Scq32Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m4_vl, "q16Ssq16Ssq16Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m4_m_vl, "q16Ssq16bq16Ssq16Ssq16Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m4_vl, "q8Siq8Siq8Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m4_m_vl, "q8Siq8bq8Siq8Siq8Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m4_vl, "q4SWiq4SWiq4SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m4_m_vl, "q4SWiq4bq4SWiq4SWiq4SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m8_vl, "q64Scq64Scq64Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8m8_m_vl, "q64Scq64bq64Scq64Scq64Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m8_vl, "q32Ssq32Ssq32Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16m8_m_vl, "q32Ssq32bq32Ssq32Ssq32Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m8_vl, "q16Siq16Siq16Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i32m8_m_vl, "q16Siq16bq16Siq16Siq16Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m8_vl, "q8SWiq8SWiq8SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i64m8_m_vl, "q8SWiq8bq8SWiq8SWiq8SWiz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf2_vl, "q4Scq4Scq4Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf2_m_vl, "q4Scq4bq4Scq4Scq4Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16mf2_vl, "q2Ssq2Ssq2Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16mf2_m_vl, "q2Ssq2bq2Ssq2Ssq2Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i32mf2_vl, "q1Siq1Siq1Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i32mf2_m_vl, "q1Siq1bq1Siq1Siq1Siz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf4_vl, "q2Scq2Scq2Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf4_m_vl, "q2Scq2bq2Scq2Scq2Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i16mf4_vl, "q1Ssq1Ssq1Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i16mf4_m_vl, "q1Ssq1bq1Ssq1Ssq1Ssz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf8_vl, "q1Scq1Scq1Scz", "n")
-RISCVV_BUILTIN(vadd_vv_i8mf8_m_vl, "q1Scq1bq1Scq1Scq1Scz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m1_vl, "q8Scq8ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m1_m_vl, "q8Scq8bq8Scq8ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m1_vl, "q4Ssq4SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m1_m_vl, "q4Ssq4bq4Ssq4SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m1_vl, "q2Siq2SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m1_m_vl, "q2Siq2bq2Siq2SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m1_vl, "q1SWiq1SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m1_m_vl, "q1SWiq1bq1SWiq1SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m2_vl, "q16Scq16ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m2_m_vl, "q16Scq16bq16Scq16ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m2_vl, "q8Ssq8SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m2_m_vl, "q8Ssq8bq8Ssq8SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m2_vl, "q4Siq4SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m2_m_vl, "q4Siq4bq4Siq4SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m2_vl, "q2SWiq2SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m2_m_vl, "q2SWiq2bq2SWiq2SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m4_vl, "q32Scq32ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m4_m_vl, "q32Scq32bq32Scq32ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m4_vl, "q16Ssq16SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m4_m_vl, "q16Ssq16bq16Ssq16SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m4_vl, "q8Siq8SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m4_m_vl, "q8Siq8bq8Siq8SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m4_vl, "q4SWiq4SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m4_m_vl, "q4SWiq4bq4SWiq4SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m8_vl, "q64Scq64ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8m8_m_vl, "q64Scq64bq64Scq64ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m8_vl, "q32Ssq32SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16m8_m_vl, "q32Ssq32bq32Ssq32SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m8_vl, "q16Siq16SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i32m8_m_vl, "q16Siq16bq16Siq16SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m8_vl, "q8SWiq8SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i64m8_m_vl, "q8SWiq8bq8SWiq8SWiSWiz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf2_vl, "q4Scq4ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf2_m_vl, "q4Scq4bq4Scq4ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16mf2_vl, "q2Ssq2SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16mf2_m_vl, "q2Ssq2bq2Ssq2SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i32mf2_vl, "q1Siq1SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i32mf2_m_vl, "q1Siq1bq1Siq1SiSiz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf4_vl, "q2Scq2ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf4_m_vl, "q2Scq2bq2Scq2ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i16mf4_vl, "q1Ssq1SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i16mf4_m_vl, "q1Ssq1bq1Ssq1SsSsz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf8_vl, "q1Scq1ScScz", "n")
-RISCVV_BUILTIN(vadd_vx_i8mf8_m_vl, "q1Scq1bq1Scq1ScScz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m1_vl, "q8Ucq8Ucq8Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m1_m_vl, "q8Ucq8bq8Ucq8Ucq8Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m1_vl, "q4Usq4Usq4Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m1_m_vl, "q4Usq4bq4Usq4Usq4Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m1_vl, "q2Uiq2Uiq2Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m1_m_vl, "q2Uiq2bq2Uiq2Uiq2Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m1_vl, "q1UWiq1UWiq1UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m1_m_vl, "q1UWiq1bq1UWiq1UWiq1UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m2_vl, "q16Ucq16Ucq16Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m2_m_vl, "q16Ucq16bq16Ucq16Ucq16Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m2_vl, "q8Usq8Usq8Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m2_m_vl, "q8Usq8bq8Usq8Usq8Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m2_vl, "q4Uiq4Uiq4Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m2_m_vl, "q4Uiq4bq4Uiq4Uiq4Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m2_vl, "q2UWiq2UWiq2UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m2_m_vl, "q2UWiq2bq2UWiq2UWiq2UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m4_vl, "q32Ucq32Ucq32Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m4_m_vl, "q32Ucq32bq32Ucq32Ucq32Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m4_vl, "q16Usq16Usq16Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m4_m_vl, "q16Usq16bq16Usq16Usq16Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m4_vl, "q8Uiq8Uiq8Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m4_m_vl, "q8Uiq8bq8Uiq8Uiq8Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m4_vl, "q4UWiq4UWiq4UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m4_m_vl, "q4UWiq4bq4UWiq4UWiq4UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m8_vl, "q64Ucq64Ucq64Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8m8_m_vl, "q64Ucq64bq64Ucq64Ucq64Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m8_vl, "q32Usq32Usq32Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16m8_m_vl, "q32Usq32bq32Usq32Usq32Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m8_vl, "q16Uiq16Uiq16Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u32m8_m_vl, "q16Uiq16bq16Uiq16Uiq16Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m8_vl, "q8UWiq8UWiq8UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u64m8_m_vl, "q8UWiq8bq8UWiq8UWiq8UWiz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf2_vl, "q4Ucq4Ucq4Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf2_m_vl, "q4Ucq4bq4Ucq4Ucq4Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16mf2_vl, "q2Usq2Usq2Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16mf2_m_vl, "q2Usq2bq2Usq2Usq2Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u32mf2_vl, "q1Uiq1Uiq1Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u32mf2_m_vl, "q1Uiq1bq1Uiq1Uiq1Uiz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf4_vl, "q2Ucq2Ucq2Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf4_m_vl, "q2Ucq2bq2Ucq2Ucq2Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u16mf4_vl, "q1Usq1Usq1Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u16mf4_m_vl, "q1Usq1bq1Usq1Usq1Usz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf8_vl, "q1Ucq1Ucq1Ucz", "n")
-RISCVV_BUILTIN(vadd_vv_u8mf8_m_vl, "q1Ucq1bq1Ucq1Ucq1Ucz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m1_vl, "q8Ucq8UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m1_m_vl, "q8Ucq8bq8Ucq8UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m1_vl, "q4Usq4UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m1_m_vl, "q4Usq4bq4Usq4UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m1_vl, "q2Uiq2UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m1_m_vl, "q2Uiq2bq2Uiq2UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m1_vl, "q1UWiq1UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m1_m_vl, "q1UWiq1bq1UWiq1UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m2_vl, "q16Ucq16UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m2_m_vl, "q16Ucq16bq16Ucq16UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m2_vl, "q8Usq8UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m2_m_vl, "q8Usq8bq8Usq8UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m2_vl, "q4Uiq4UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m2_m_vl, "q4Uiq4bq4Uiq4UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m2_vl, "q2UWiq2UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m2_m_vl, "q2UWiq2bq2UWiq2UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m4_vl, "q32Ucq32UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m4_m_vl, "q32Ucq32bq32Ucq32UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m4_vl, "q16Usq16UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m4_m_vl, "q16Usq16bq16Usq16UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m4_vl, "q8Uiq8UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m4_m_vl, "q8Uiq8bq8Uiq8UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m4_vl, "q4UWiq4UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m4_m_vl, "q4UWiq4bq4UWiq4UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m8_vl, "q64Ucq64UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8m8_m_vl, "q64Ucq64bq64Ucq64UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m8_vl, "q32Usq32UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16m8_m_vl, "q32Usq32bq32Usq32UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m8_vl, "q16Uiq16UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u32m8_m_vl, "q16Uiq16bq16Uiq16UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m8_vl, "q8UWiq8UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u64m8_m_vl, "q8UWiq8bq8UWiq8UWiUWiz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf2_vl, "q4Ucq4UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf2_m_vl, "q4Ucq4bq4Ucq4UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16mf2_vl, "q2Usq2UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16mf2_m_vl, "q2Usq2bq2Usq2UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u32mf2_vl, "q1Uiq1UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u32mf2_m_vl, "q1Uiq1bq1Uiq1UiUiz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf4_vl, "q2Ucq2UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf4_m_vl, "q2Ucq2bq2Ucq2UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u16mf4_vl, "q1Usq1UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u16mf4_m_vl, "q1Usq1bq1Usq1UsUsz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf8_vl, "q1Ucq1UcUcz", "n")
-RISCVV_BUILTIN(vadd_vx_u8mf8_m_vl, "q1Ucq1bq1Ucq1UcUcz", "n")
+#include "clang/Basic/riscv_vector_builtins.inc"
----------------
BUILTIN is undefined here. I am not sure how to add new builtins for other extension.
================
Comment at: clang/include/clang/Basic/riscv_vector.td:188
+ list<list<string>> suffixes_prototypes> {
+ let IRName = intrinsic_name, IRNameMask = intrinsic_name #"_mask" in {
+ foreach s_p = suffixes_prototypes in {
----------------
Add space before "_mask"
================
Comment at: clang/include/clang/Basic/riscv_vector.td:190
+ foreach s_p = suffixes_prototypes in {
+ let Name = NAME #"_" # s_p[0] in {
+ defvar suffix = s_p[1];
----------------
Add space before "_"
Repository:
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https://reviews.llvm.org/D95016/new/
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