[PATCH] D95135: Fix signedness in vector bitcast evaluation

[Sven van Haastregt via Phabricator via cfe-commits]

svenvh created this revision.
svenvh added a reviewer: Anastasia.
svenvh requested review of this revision.
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The included test case triggered a sign assertion on the result in
`Success()`.  This was caused by the APSInt created for a bitcast
having its signedness bit inverted.  The second APSInt constructor
argument is `isUnsigned`, so invert the result of
`isSignedIntegerType`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D95135

Files:
  clang/lib/AST/ExprConstant.cpp
  clang/test/CodeGenOpenCL/vector_literals.cl


Index: clang/test/CodeGenOpenCL/vector_literals.cl
===================================================================
--- clang/test/CodeGenOpenCL/vector_literals.cl
+++ clang/test/CodeGenOpenCL/vector_literals.cl
@@ -63,3 +63,10 @@
   //CHECK: store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float>* %V2
   float4 V2 = (float4)(1);
 }
+
+void vector_literals_with_cast() {
+  // CHECK-LABEL: vector_literals_with_cast
+  // CHECK: store <2 x i32> <i32 12, i32 34>, <2 x i32>*
+  // CHECK: extractelement <2 x i32> %{{[0-9]+}}, i64 0
+  unsigned int withCast = ((int2)((int2)(12, 34))).s0;
+}
Index: clang/lib/AST/ExprConstant.cpp
===================================================================
--- clang/lib/AST/ExprConstant.cpp
+++ clang/lib/AST/ExprConstant.cpp
@@ -10206,7 +10206,7 @@
           Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize);
         else
           Elt = SValInt.rotr(i*EltSize).zextOrTrunc(EltSize);
-        Elts.push_back(APValue(APSInt(Elt, EltTy->isSignedIntegerType())));
+        Elts.push_back(APValue(APSInt(Elt, !EltTy->isSignedIntegerType())));
       }
     } else {
       return Error(E);


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